H03K5/1254

METHOD FOR DEBOUNCING AN ELECTRICAL INPUT SIGNAL, AND DEBOUNCING MODULE
20200328735 · 2020-10-15 · ·

A method for debouncing an electrical input signal (x.sub.in) includes following steps: (1) an input signal (x.sub.in) is received and a present value of the input signal (x.sub.in) is ascertained; (2) ascertaining whether the present value of the input signal (x.sub.in) is above or below at least one predefined limit value (x.sub.G); (3) producing a debounce status variable (x.sub.E) having a defined initial value; (4) altering the value of the debounce status variable (x.sub.E) on the basis of at least whether the value of the input signal (x.sub.in) is above or below the at least one limit value (x.sub.G), (5) generating an output signal (x.sub.out) on the basis of whether the value of the debounce status variable (x.sub.E) corresponds to the minimum value (W.sub.min), to the maximum value (W.sub.max) or to a value between the minimum value (W.sub.min) and the maximum value (W.sub.max).

USER INPUT DEVICES AND METHODS FOR IDENTIFYING A USER INPUT IN A USER INPUT DEVICE
20200249768 · 2020-08-06 ·

According to various embodiments, there is provided a method for identifying a user input in a user input device, the method including: detecting edges in an output signal generated by a switch in the user input device; identifying a first-to-second-state edge as being indicative of a transition from a first state to a second state; counting down to a first rest period upon identifying the first-to-second-state edge; before completion of the counting down to the first rest period, restarting the counting down upon each detection of a further edge in the output signal; detecting a second-to-first-state edge in the output signal that occurs after completion of the counting down to the first rest period; and identifying the second-to-first-state edge as being indicative of a transition from the second state to the first state.

Flyback power converter having overly high voltage protection and primary side controller circuit thereof
10686366 · 2020-06-16 · ·

A flyback power converter includes: a transformer, a primary side switch and a primary side controller circuit. The primary side controller circuit includes: a pulse modulation circuit and a protection control circuit. The pulse modulation circuit generates a pulse modulation signal. The protection control circuit is coupled to the pulse modulation circuit and compares an AC voltage related signal with an over voltage threshold. When the AC voltage related signal exceeds the over voltage threshold, the comparison circuit generates an over voltage protection trigger signal. When the pulse number of the over voltage protection trigger signal exceeds the over voltage counting threshold, the over voltage counter circuit triggers an over voltage protection signal, to indicate that an over voltage condition occurs, and a protection operation is performed.

Flyback power converter having overly high voltage protection and primary side controller circuit thereof
10686366 · 2020-06-16 · ·

A flyback power converter includes: a transformer, a primary side switch and a primary side controller circuit. The primary side controller circuit includes: a pulse modulation circuit and a protection control circuit. The pulse modulation circuit generates a pulse modulation signal. The protection control circuit is coupled to the pulse modulation circuit and compares an AC voltage related signal with an over voltage threshold. When the AC voltage related signal exceeds the over voltage threshold, the comparison circuit generates an over voltage protection trigger signal. When the pulse number of the over voltage protection trigger signal exceeds the over voltage counting threshold, the over voltage counter circuit triggers an over voltage protection signal, to indicate that an over voltage condition occurs, and a protection operation is performed.

Devices, methods for controlling a device, and computer-readable media

A device having a memory configured to store information indicating debounce times for the device's switches and having circuits configured to determine whether the switches are depressed and closed based on the debounce times. The debounce times are updated based on the age of the device and/or switch usage. The method for debouncing may be performed by a computer having computer-readable media directed to adjusting the debounce times based on the age of the device containing the switches.

Devices, methods for controlling a device, and computer-readable media

A device having a memory configured to store information indicating debounce times for the device's switches and having circuits configured to determine whether the switches are depressed and closed based on the debounce times. The debounce times are updated based on the age of the device and/or switch usage. The method for debouncing may be performed by a computer having computer-readable media directed to adjusting the debounce times based on the age of the device containing the switches.

DEBOUNCE CIRCUIT USING D FLIP-FLOPS
20200162064 · 2020-05-21 ·

A debounce circuit includes a sampling circuit to sample an input signal four times at two adjacent rising edges and two adjacent falling edges of a first clock signal to determine a voltage level of the first output signal, a voltage level of the second output signal, a voltage level of the third output signal and a voltage level of the fourth output signal, and a logic gate for performing an AND operation or an OR operation on the first output signal, the second output signal, the third output signal, and the fourth output signal to output a debounced signal. The first clock signal has at least one of the two adjacent rising edges between the two adjacent falling edges and at least one of the two adjacent falling edges between the two adjacent rising edges.

DEBOUNCE CIRCUIT USING D FLIP-FLOPS
20200162064 · 2020-05-21 ·

A debounce circuit includes a sampling circuit to sample an input signal four times at two adjacent rising edges and two adjacent falling edges of a first clock signal to determine a voltage level of the first output signal, a voltage level of the second output signal, a voltage level of the third output signal and a voltage level of the fourth output signal, and a logic gate for performing an AND operation or an OR operation on the first output signal, the second output signal, the third output signal, and the fourth output signal to output a debounced signal. The first clock signal has at least one of the two adjacent rising edges between the two adjacent falling edges and at least one of the two adjacent falling edges between the two adjacent rising edges.

Amending circuit of correcting bouncing misjudgment of a keyswitch
10659077 · 2020-05-19 · ·

An amending circuit of correcting bouncing misjudgment of a keyswitch includes a comparing unit, a predetermined voltage generating unit and a controlling unit. The comparing unit has a first input terminal, a second input terminal and an output terminal. The first input terminal is adapted to receive a triggering signal generated by the keyswitch. The predetermined voltage generating unit is electrically connected to the second input terminal and adapted to generate a first predetermined voltage. The controlling unit is electrically connected to the output terminal. The controlling unit is adapted to determine whether to execute polling application according to a comparison result of the comparing unit, and to generate a confirming signal while a polling result of the polling application is kept at a specific level. The confirming signal is used by an external processor to confirm that the keyswitch is actually triggered.

Amending circuit of correcting bouncing misjudgment of a keyswitch
10659077 · 2020-05-19 · ·

An amending circuit of correcting bouncing misjudgment of a keyswitch includes a comparing unit, a predetermined voltage generating unit and a controlling unit. The comparing unit has a first input terminal, a second input terminal and an output terminal. The first input terminal is adapted to receive a triggering signal generated by the keyswitch. The predetermined voltage generating unit is electrically connected to the second input terminal and adapted to generate a first predetermined voltage. The controlling unit is electrically connected to the output terminal. The controlling unit is adapted to determine whether to execute polling application according to a comparison result of the comparing unit, and to generate a confirming signal while a polling result of the polling application is kept at a specific level. The confirming signal is used by an external processor to confirm that the keyswitch is actually triggered.