A gate driver includes: a timing determination unit configured to measure an on-time of a switching element and configured to determine, based on the on-time, a certain timing during a turn-off period of the switching element as an intermediate timing; and a driving condition changing unit configured to change a gate driving condition of the switching element at the intermediate timing determined by the timing determination unit.

A circuit to control a switching characteristic of a switching device. The circuit includes a driver circuit comprising an output port, where the driver circuit is configured to generate, at the output port, a control signal to actuate the switching device within a first time period. The control signal comprising at least one electrical pulse, where a pulse width of the at least one electrical pulse being shorter than the first time period. The circuit also includes a coupling circuit that is configured to use the control signal to actuate the switching device to establish a target switching characteristic of the switching device according to a modulation of the at least one electrical pulse. The control circuit is also configured to provide a greater impedance to the control signal than an impedance of the output terminal of the driver circuit.

A driver circuit and corresponding methods and systems are disclosed, the driver circuit comprises a signal generation circuit to generate a linearly varying signal at a first node based on a clock signal and an output transistor to receive the linearly varying signal and output a drive signal to a bus. A buffer amplifier is coupled between the first node and a gate of the output transistor to disable the gate capacitance of the output transistor. The driver circuit further comprises a capacitor coupled between the first node and a feedback node of the driver circuit such that the Miller effect occurs at the capacitor and a slew rate for the drive signal is generated at the feedback node.

A gate drive apparatus including a gate drive unit configured to drive a gate of a switching device, a peak detection unit configured to detect that a voltage across main terminals applied between the main terminals of the switching device during a turn-off period of the switching device is at a peak, and a driving condition changing unit configured to increase a change speed of a gate voltage of the switching device caused by the gate drive unit, in response to a detection that the voltage across main terminals is at a peak.

A switching circuit can help reduce electrical feedback ringing at a gate terminal of a transistor. The switching circuit can include a transistor circuit to switch an electrical signal and a control circuit to provide an actuation signal to the gate terminal of the transistor device. The switching circuit can also include a booster circuit that is disposed between the control circuit and the gate terminal of the transistor device. The booster circuit can be configured to detect a signal from the control circuit to turn off the transistor device and, responsive to the detected signal, drive a current into the gate terminal of the transistor device for a specified span of time before the transistor device turns off.

A driving circuit for a semiconductor circuit which includes a pair of main terminals through which a main current is conducted and a control terminal to which a control voltage is applied to control a circulation state of the main current, includes: driving voltage switching circuitry that receives a control signal, instructs switching between driving voltages based on a change in the control signal, and outputs a driving voltage, among the driving voltages, that has been selected in the switching; low-speed control circuitry that instructs an increase-decrease change in the control voltage at a low speed; speed-increase control circuitry that executes a speed-increase control of increasing a speed of the increase-decrease change made by the low-speed control circuitry; and speed-increase switching circuitry that instructs switching between an execution and a non-execution of the speed-increase control, and instructs switching between levels of a speed-increase change caused by the speed-increase control.

An over-current protection circuit for limiting a power current flowing through a switch device, which generates the power current according to a control signal of a control node, is provided. The over current control circuit includes a voltage control circuit, a current sense unit, a conversion circuit, and a control switch. The voltage control circuit provides the control signal to a gate terminal of the switch device according to a limit signal. The current sense unit senses the power current flowing through the switch device to generate a sense voltage. The conversion circuit converts the sense voltage into a conversion voltage. The control switch generates the limit signal according to the conversion voltage.

An RF signal switch circuit that allows connection of any of N radio frequency (RF) input terminals to a switch output port, either in a low loss mode, in a bypass mode, or, optionally, in a signal function mode. Embodiments of the invention allow for both a single switch in the series input path to a target circuit while still having the ability to isolate the bypass path from the target circuit. In the low loss and bypass mode, the circuit simultaneously exhibits low input insertion loss (and thus a low noise factor) and high bypass mode isolation.

Disclosed in the present application is a power source switch circuit, comprising a switch circuit, a switch control circuit arranged to control the connection and disconnection of the switch circuit, and a negative feedback circuit arranged to feed back the output voltage of the switch circuit to the switch circuit, an input end of the switch circuit respectively being connected to the switch control circuit and a power source, an output end of the switch circuit respectively being connected to a load circuit and the negative feedback circuit, a control end of the switch circuit respectively being connected to the switch control circuit and the negative feedback circuit, and the switch control circuit also being connected to the negative feedback circuit.

A voltage pulse generator comprising: circuitry controllable to generate a voltage pulse at an output of the circuitry; and an interruptor that monitors voltage at the output during a transition edge of the voltage pulse and interrupts a voltage change associated with the transition edge if the monitored voltage differs from a predetermined reference voltage by a predetermined amount.