Disclosed herein is a hybrid resonant capacitor circuit including a first capacitor configured to discharge resonant current to interrupt a load current to a switch in parallel with the hybrid resonant capacitor circuit, a second capacitor coupled in parallel with the first capacitor, wherein the second capacitor is configured to transfer energy stored in the second capacitor to the first capacitor after discharge of the resonant current from the first capacitor, and a current limiter coupled in series with the second capacitor. A static transfer switch including a thyristor switch and the hybrid resonant capacitor circuit is also disclosed herein, as is a method for facilitating multiple consecutive voltage source transfers between a first voltage source and a second voltage source powering a load, using the hybrid resonant capacitor circuit.

Bias adjusting circuits (1_(2k-1), 1_2k) (where k is an integer equal to or greater than 1 and equal to or less than N, and N is an integer equal to or more than .sub.2) adjust DC bias voltage of at least one of clock signals such that a duty ratio, which is a ratio between a period in which a clock signal is High as to a clock signal and a period in which the clock signal is Low thereasto, becomes (2N-2k+1):(2k-1). Sampling circuits switch between a track mode in which an output signal tracks an input signal, and a hold mode in which a value of the input signal at a timing of switching from the track mode to the hold mode is held and output, in accordance with clock signals output from the bias adjusting circuits (2_1 to 2_2N).

Bias adjusting circuits (1_(2k-1), 1_2k) (where k is an integer equal to or greater than 1 and equal to or less than N, and N is an integer equal to or more than .sub.2) adjust DC bias voltage of at least one of clock signals such that a duty ratio, which is a ratio between a period in which a clock signal is High as to a clock signal and a period in which the clock signal is Low thereasto, becomes (2N-2k+1):(2k-1). Sampling circuits switch between a track mode in which an output signal tracks an input signal, and a hold mode in which a value of the input signal at a timing of switching from the track mode to the hold mode is held and output, in accordance with clock signals output from the bias adjusting circuits (2_1 to 2_2N).

To provide a technique for detecting a low voltage of a power-on reset circuit. A semiconductor device has a power-on reset circuit including: a first bipolar transistor; a second bipolar transistor formed by connecting a plurality of bipolar transistors in parallel; a detection-voltage adjusting resistance element; a temperature-characteristic adjusting resistance element; a current adjusting resistance element; and a comparator.

To provide a technique for detecting a low voltage of a power-on reset circuit. A semiconductor device has a power-on reset circuit including: a first bipolar transistor; a second bipolar transistor formed by connecting a plurality of bipolar transistors in parallel; a detection-voltage adjusting resistance element; a temperature-characteristic adjusting resistance element; a current adjusting resistance element; and a comparator.

A voltage stabilizer is provided for stabilizing a gate-source voltage of a switching element, wherein a source of the switching element receives a first driving voltage. The voltage stabilizer includes a bipolar junction transistor, a first resistor and a second resistor. A base of the bipolar junction transistor receives a second driving voltage, a collector of the bipolar junction transistor is electrically connected to a gate of the switching element, a first terminal of the first resistor is electrically connected to the collector and the gate, a second terminal of the first resistor is electrically connected to the source of the switching element and receives the first driving voltage, a first terminal of the second resistor is electrically connected to an emitter of the bipolar junction transistor, and a second terminal of the second resistor receives a third driving voltage The bipolar junction transistor is operated in an active region.

A voltage stabilizer is provided for stabilizing a gate-source voltage of a switching element, wherein a source of the switching element receives a first driving voltage. The voltage stabilizer includes a bipolar junction transistor, a first resistor and a second resistor. A base of the bipolar junction transistor receives a second driving voltage, a collector of the bipolar junction transistor is electrically connected to a gate of the switching element, a first terminal of the first resistor is electrically connected to the collector and the gate, a second terminal of the first resistor is electrically connected to the source of the switching element and receives the first driving voltage, a first terminal of the second resistor is electrically connected to an emitter of the bipolar junction transistor, and a second terminal of the second resistor receives a third driving voltage The bipolar junction transistor is operated in an active region.

A control device for connecting between two portions of an electrical power supply line. The device includes a bipolar transistor including a wide bandgap semiconductor material and having its emitter connected to one portion of the power supply line, its collector connected to another portion of the power supply line, and the device also including control connected to the base of the transistor.

A control device for connecting between two portions of an electrical power supply line. The device includes a bipolar transistor including a wide bandgap semiconductor material and having its emitter connected to one portion of the power supply line, its collector connected to another portion of the power supply line, and the device also including control connected to the base of the transistor.

A circuit breaker with pre-charging and current limiting functions, wherein the circuit breaker is configured for being provided in a power line connecting an electrical energy source and an electric network. The circuit breaker includes a short circuit protection unit including a first semiconductor switch, a precharge unit connected in parallel to the short circuit protection unit and including a second semiconductor switch, and a current limit unit connected in parallel to the short circuit protection unit and to the precharge unit, the current limit unit including a third semiconductor switch.