A device including an inverter circuit, a hysteresis control circuit, and a high-side input level shifter. The inverter circuit having an output and including at least two series connected PMOS transistors connected, at the output, in series to at least two series connected NMOS transistors. The hysteresis control circuit coupled to the output to provide feedback to the at least two series connected PMOS transistors and to the at least two series connected NMOS transistors. The high-side input level shifter connected to gates of the at least two PMOS transistors and configured to shift a low level of an input signal to a higher level and provide the higher level to one or more of the gates of the at least two PMOS transistors.

In an embodiment an isolated gate driver device includes a low-voltage section having a control input configured to receive a PWM control signal with a switching frequency from a control stage, a high-voltage section, galvanically isolated from the low-voltage section the high-voltage section including a driving output configured to provide a gate-driving signal as a function of the PWM control signal to a power stage having at least one switch, a feedback input configured to receive at least one feedback signal indicative of an operation of the power stag, and an ADC module configured to convert the feedback signal into a digital data stream and a conversion-control module coupled to the ADC module and configured to provide a conversion-trigger signal designed to determine a start of a conversion for acquiring a new sample of the feedback signal.

In an embodiment an isolated gate driver device includes a low-voltage section having a control input configured to receive a PWM control signal with a switching frequency from a control stage, a high-voltage section, galvanically isolated from the low-voltage section the high-voltage section including a driving output configured to provide a gate-driving signal as a function of the PWM control signal to a power stage having at least one switch, a feedback input configured to receive at least one feedback signal indicative of an operation of the power stag, and an ADC module configured to convert the feedback signal into a digital data stream and a conversion-control module coupled to the ADC module and configured to provide a conversion-trigger signal designed to determine a start of a conversion for acquiring a new sample of the feedback signal.

A level conversion circuit includes a first pin, a second pin, a target pin, a core module and a switch. A first terminal of the switch is connected to the first pin, a second terminal of the switch is connected to the second pin, and the core module is connected to the target pin, the second pin and a control terminal of the switch respectively. The core module is configured to: when a voltage connected to the target pin is at a first reference high level, control the switch to turn on to transmit a signal with a specified voltage amplitude, and pull the first pin to the first reference high level and the second pin to a second reference high level based on the first reference high level; where the first reference high level is higher than the second reference high level.

A level conversion circuit includes a first pin, a second pin, a target pin, a core module and a switch. A first terminal of the switch is connected to the first pin, a second terminal of the switch is connected to the second pin, and the core module is connected to the target pin, the second pin and a control terminal of the switch respectively. The core module is configured to: when a voltage connected to the target pin is at a first reference high level, control the switch to turn on to transmit a signal with a specified voltage amplitude, and pull the first pin to the first reference high level and the second pin to a second reference high level based on the first reference high level; where the first reference high level is higher than the second reference high level.

This application discloses a drive circuit of a bridge arm switching transistor, a drive circuit, and a power converter. The bridge arm switching transistor includes a first switching transistor and a second switching transistor. A first terminal of the first switching transistor is connected to a power supply, a second terminal of the first switching transistor is connected to a first terminal of the second switching transistor, and a second terminal of the second switching transistor is grounded. The drive circuit includes a low-voltage region and at least two high-voltage regions isolated which include a first high-voltage region and a second high-voltage region. A semiconductor device configured to drive the second switching transistor is disposed in the low-voltage region. P-type semiconductor devices are disposed in each of the first high-voltage region and the second high-voltage region, and the P-type semiconductor devices are configured to drive the first switching transistor.

This application discloses a drive circuit of a bridge arm switching transistor, a drive circuit, and a power converter. The bridge arm switching transistor includes a first switching transistor and a second switching transistor. A first terminal of the first switching transistor is connected to a power supply, a second terminal of the first switching transistor is connected to a first terminal of the second switching transistor, and a second terminal of the second switching transistor is grounded. The drive circuit includes a low-voltage region and at least two high-voltage regions isolated which include a first high-voltage region and a second high-voltage region. A semiconductor device configured to drive the second switching transistor is disposed in the low-voltage region. P-type semiconductor devices are disposed in each of the first high-voltage region and the second high-voltage region, and the P-type semiconductor devices are configured to drive the first switching transistor.

A compact solid state relay (7) is provided. Solid state devices (74, 75), such as Triacs or Thyristors are used to implement the relay functionality. The device is at least partially enclosed in a housing that has pins for mounting on an electronics board. A number of “U” shaped jumpers (72) or other jumpers or wires are provided in the housing to act as heat sinks. A sub-miniature fan (70) is positioned to create an air flow over the heat sinks and dissipate heat from the device.

A compact solid state relay (7) is provided. Solid state devices (74, 75), such as Triacs or Thyristors are used to implement the relay functionality. The device is at least partially enclosed in a housing that has pins for mounting on an electronics board. A number of “U” shaped jumpers (72) or other jumpers or wires are provided in the housing to act as heat sinks. A sub-miniature fan (70) is positioned to create an air flow over the heat sinks and dissipate heat from the device.

This application relates to electric winders, particularly, to an intelligent electric winder and a control method therefor. The intelligent electric winder includes a support, a control unit and a winder body, where the winder body includes a casing, a winding reel, a drive structure, and a cable. The drive structure is electrically connected to the control unit. The control unit includes: a socket and a host; the host is arranged inside the casing, and the socket is arranged outside the casing; a start/stop button is provided on a surface of the socket, and the socket is connected to a free end of the cable. Through the intelligent electric winder and a control method therefor, the winding reel is controlled to start or stop winding by sending a wireless control signal, so that the intelligent electric winder is controlled to wind or unwind cables through the wireless communication.