A semiconductor device including a first semiconductor chip, a second semiconductor chip, the junction temperature of which becomes higher than that of the first semiconductor chip during switching of the semiconductor device, a collector pattern electrically connected to a collector of the first semiconductor chip and a collector of the second semiconductor chip, an emitter pattern electrically connected to an emitter of the first semiconductor chip and an emitter of the second semiconductor chip, a gate pattern electrically connected to a gate of the first semiconductor chip, a first diode having an anode electrically connected to the gate pattern and a cathode electrically connected to a gate of the second semiconductor chip and a second diode connected in reverse parallel with the first diode.

A semiconductor device including a first semiconductor chip, a second semiconductor chip, the junction temperature of which becomes higher than that of the first semiconductor chip during switching of the semiconductor device, a collector pattern electrically connected to a collector of the first semiconductor chip and a collector of the second semiconductor chip, an emitter pattern electrically connected to an emitter of the first semiconductor chip and an emitter of the second semiconductor chip, a gate pattern electrically connected to a gate of the first semiconductor chip, a first diode having an anode electrically connected to the gate pattern and a cathode electrically connected to a gate of the second semiconductor chip and a second diode connected in reverse parallel with the first diode.

A semiconductor device including a first semiconductor chip, a second semiconductor chip, the junction temperature of which becomes higher than that of the first semiconductor chip during switching of the semiconductor device, a collector pattern electrically connected to a collector of the first semiconductor chip and a collector of the second semiconductor chip, an emitter pattern electrically connected to an emitter of the first semiconductor chip and an emitter of the second semiconductor chip, a gate pattern electrically connected to a gate of the first semiconductor chip, a first diode having an anode electrically connected to the gate pattern and a cathode electrically connected to a gate of the second semiconductor chip and a second diode connected in reverse parallel with the first diode.

A semiconductor device including a first semiconductor chip, a second semiconductor chip, the junction temperature of which becomes higher than that of the first semiconductor chip during switching of the semiconductor device, a collector pattern electrically connected to a collector of the first semiconductor chip and a collector of the second semiconductor chip, an emitter pattern electrically connected to an emitter of the first semiconductor chip and an emitter of the second semiconductor chip, a gate pattern electrically connected to a gate of the first semiconductor chip, a first diode having an anode electrically connected to the gate pattern and a cathode electrically connected to a gate of the second semiconductor chip and a second diode connected in reverse parallel with the first diode.

According to one embodiment, a solid state relay with ultra low emissions is disclosed. The solid state relay includes one or more inputs for receiving a control signal, an input circuit for processing the received control signal. An output circuit responsive to the control signal to close the solid state relay so that power may be delivered from a power source to an electrical load. The input circuit can include zero-crossing functionality configured such that the solid state relay does not turn on until an AC source signal crosses from a negative value to a positive value or from a positive value to a negative value. The zero crossing functionality may comprise opto-couplers with zero crossing functionality. The input circuit may further comprise a low emission driver portion that is to reduce emissions during the portion after the initial start up.

A single-pole double-throw switch includes switching units which are set between a first port and a second port and between the first port and a third port, respectively, and are configured to perform complementarily. The each switching unit includes an antenna port, a circuit port, a transmission line configured to couple them, and a switching element connected between the transmission line and a ground. The switching element includes a parallel circuit including a transistor and an inductor connected in parallel, and a capacitor connected in series with the parallel circuit. The transmission line has a characteristic impedance different from a impedance seen inside the switching unit from the antenna port and a impedance seen inside the switching unit from the circuit port.

A single-pole double-throw switch includes switching units which are set between a first port and a second port and between the first port and a third port, respectively, and are configured to perform complementarily. The each switching unit includes an antenna port, a circuit port, a transmission line configured to couple them, and a switching element connected between the transmission line and a ground. The switching element includes a parallel circuit including a transistor and an inductor connected in parallel, and a capacitor connected in series with the parallel circuit. The transmission line has a characteristic impedance different from a impedance seen inside the switching unit from the antenna port and a impedance seen inside the switching unit from the circuit port.

A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.

A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.

According to one embodiment, a solid state relay with ultra low emissions is disclosed. The solid state relay includes one or more inputs for receiving a control signal, an input circuit for processing the received control signal. An output circuit responsive to the control signal to close the solid state relay so that power may be delivered from a power source to an electrical load. The input circuit can include zero-crossing functionality configured such that the solid state relay does not turn on until an AC source signal crosses from a negative value to a positive value or from a positive value to a negative value. The zero crossing functionality may comprise opto-couplers with zero crossing functionality. The input circuit may further comprise a low emission driver portion that is to reduce emissions during the portion after the initial start up.