A solid-state relay circuit includes an isolator circuit, a first output terminal, a second output terminal, and an output switch. The output switch is coupled to the isolator circuit, and includes a first transistor, a second transistor, and a diode. The first transistor is coupled to the first output terminal. The second transistor is coupled to the first transistor and the second output terminal. The diode is coupled to the first transistor, the second transistor, and ground, and is configured to block current flow from ground to the first transistor and the second transistor. The isolator circuit is coupled to the output switch and is configured to activate the first transistor and the second transistor.

A solid-state relay circuit includes an isolator circuit, a first output terminal, a second output terminal, and an output switch. The output switch is coupled to the isolator circuit, and includes a first transistor, a second transistor, and a diode. The first transistor is coupled to the first output terminal. The second transistor is coupled to the first transistor and the second output terminal. The diode is coupled to the first transistor, the second transistor, and ground, and is configured to block current flow from ground to the first transistor and the second transistor. The isolator circuit is coupled to the output switch and is configured to activate the first transistor and the second transistor.

A transmit/receive switching assembly includes a symmetrical PIN diode-based switch to selectively connect an antenna port to one of a transmit port and a receive port, transmit bias control circuitry that receives a first bias control signal, receive bias control circuitry that receives a second bias control signal, and shunt bias control circuitry coupled between the symmetrical PIN diode-based switch and a reference node. The first and second bias control signals are simultaneously and oppositely switchable between first and second voltage values and together configured to operate the switch between a transmit mode where RF signal flow is enabled from the transmit port to the antenna port and isolation is provided between the antenna port and the receive port, and a receive mode where RF signal flow is enabled from the antenna port to the receive port and isolation is provided between the antenna port and the transmit port.

In the field of line commutated converters, for use in high voltage direct current (HVDC) power transmission, a line commutated converter comprises a plurality of converter limbs that extend between first and second DC terminals. Each converter limb includes first and second limb portions which are separated by an AC terminal. The first limb portions together define a first limb portion group and the second limb portions together define a second limb portion group. Each limb portion includes at least one switching element that is configured to turn on and conduct current when it is forward biased and it receives a turn on signal and to naturally turn off and no longer conduct current when it is reverse biased and the current flowing through it falls to zero. The converter also includes a control unit.

In the field of line commutated converters, for use in high voltage direct current (HVDC) power transmission, a line commutated converter comprises a plurality of converter limbs that extend between first and second DC terminals. Each converter limb includes first and second limb portions which are separated by an AC terminal. The first limb portions together define a first limb portion group and the second limb portions together define a second limb portion group. Each limb portion includes at least one switching element that is configured to turn on and conduct current when it is forward biased and it receives a turn on signal and to naturally turn off and no longer conduct current when it is reverse biased and the current flowing through it falls to zero. The converter also includes a control unit.

A power module includes a plurality of power semiconductor devices. The plurality of power semiconductor devices includes an insulated gate bipolar transistor (IGBT) and a metal-oxide-semiconductor field-effect transistor (MOSFET) coupled in parallel between a first power switching terminal and a second power switching terminal. The IGBT and the MOSFET are silicon carbide devices. By providing the IGBT and the MOSFET together, a tradeoff between forward conduction current and reverse conduction current of the power module, the efficiency, and the specific current rating of the power module may be improved. Further, providing the IGBT and the MOSFET as silicon carbide devices may significantly improve the performance of the power module.

A power module includes a plurality of power semiconductor devices. The plurality of power semiconductor devices includes an insulated gate bipolar transistor (IGBT) and a metal-oxide-semiconductor field-effect transistor (MOSFET) coupled in parallel between a first power switching terminal and a second power switching terminal. The IGBT and the MOSFET are silicon carbide devices. By providing the IGBT and the MOSFET together, a tradeoff between forward conduction current and reverse conduction current of the power module, the efficiency, and the specific current rating of the power module may be improved. Further, providing the IGBT and the MOSFET as silicon carbide devices may significantly improve the performance of the power module.

A single live line switch circuit includes a single live line connecting end, a switch unit, two wire channels, an on-state power obtaining circuit, an off-state power obtaining circuit, and an energy storage element. The single live line connecting end is connected to an external single live line. The on-state power obtaining circuit is connected to the single live line connecting end. The switch unit includes a fixed connecting end and a movable connecting end, and the fixed connecting end is connected to the on-state power obtaining circuit. The two wire channels are provided with a first connecting end and a second connecting end, respectively, and the movable connecting end of the switch unit is in contact with the first connecting end or the second connecting end. A control method of the single live line switch circuit is provided.

A single live line switch circuit includes a single live line connecting end, a switch unit, two wire channels, an on-state power obtaining circuit, an off-state power obtaining circuit, and an energy storage element. The single live line connecting end is connected to an external single live line. The on-state power obtaining circuit is connected to the single live line connecting end. The switch unit includes a fixed connecting end and a movable connecting end, and the fixed connecting end is connected to the on-state power obtaining circuit. The two wire channels are provided with a first connecting end and a second connecting end, respectively, and the movable connecting end of the switch unit is in contact with the first connecting end or the second connecting end. A control method of the single live line switch circuit is provided.

A high throw-count multiple-pole FET-based RF switch architecture that provides good RF performance in terms of insertion loss, return loss, isolation, linearity, and power handling. A common port RFC is coupled along a common path to multiple ports RFn. Embodiments introduce additional common RF path branch isolation switches which are controlled by state dependent logic. The branch isolation switches help to isolate the unused branch ports RFn and the unused portion of the common path from the active portion of the common path, and thereby reduce the reactive load attributable to such branches that degrades RF performance of the ports RFn closer to the common port RFC. The branch isolation switches can also be used to reconfigure the switch architecture for a multiplex function as well as separate switch path banks for re-configurability of purpose, tuning, or varying switch throw counts and packaging options.