An integrated radio frequency (RF) switch and method of outputting one RF signal from a plurality of RF signals is provided. The integrated RF switch comprises an input decoder, a plurality of level shifter/drivers, a negative voltage generator and a dynamic bias circuit. The input decoder determines which one of the plurality of RF signals to output. Each one of the plurality of level shifter/drivers controls output of one of the plurality of RF signals. The negative voltage generator creates a negative voltage to drive the plurality of level shifter/drivers. The dynamic bias circuit generates a bias current for the plurality of level shifter/drivers, detects a change of state from the input decoder, generates a pulse in response to detecting the change of state, and increases the bias current for the plurality of level shifter/drivers for a duration of the pulse to decrease a switching time between two RF signals.

Circuits of a TAF-DPS clock generator implemented on programmable logic chip comprise: 1) a base time unit generator created from configurable blocks, or on-chip PLL, or on-chip DLL, said base time unit generator produces a plurality of phase-evenly-spaced-signals; 2) a TAF-DPS frequency synthesizer created by configuring configurable blocks of said programmable logic chip, said TAF-DPS frequency synthesizer takes said plurality of phase-evenly-spaced-signals as its input. Methods of creating flexible clock signal to drive application comprise: 1) selecting one or more strategic areas in said programmable logic chip; 2) creating one or more TAF-DPS clock generator for each said area by using the configurable resource in said area; 3) creating control function to control the frequency and duty-cycle of the TAF-DPS clock generator output, said control function can be circuit created from configuring configurable blocks, said control function can also be achieved by software; 4) driving the circuits in application by the flexible clock generated from said TAF-DPS clock generator.