H03K23/662

Clock swallowing device for reducing voltage noise

Systems and methods for controlling a frequency of a clock signal by selectively swallowing pulses in the clock signal are described herein. In one embodiment, a method for adjusting a frequency of a clock signal comprises receiving the clock signal, and swallowing pulses in the clock signal according to a repeating clock-swallowing pattern, wherein the pattern is defined by a sequence of numbers.

Clock generation device, electronic apparatus, moving object, and clock generation method
09548724 · 2017-01-17 · ·

A clock generation device generates a clock signal which has a predetermined number of clocks for each predetermined time in such a way that a clock signal (32.768 kHz+ ( is zero or a positive number)) is input and some clocks of the clock signal are masked.

Processing device, processing system, and processing method
12498753 · 2025-12-16 · ·

A processing device according to an aspect of the present disclosure includes: a toggle signal reception circuit configured to receive a toggle signal a value of which transitions between binary values at a timing of a pulse of a frequency-divided clock signal in which a periodic pattern signal is repeated, pulses of the periodic pattern signal being generated by masking predetermined pulses of a mask pulse number among consecutive pulses of a periodic pulse number in an input clock signal, the mask pulse number being smaller than the periodic pulse number; and a communication circuit configured to communicate with another processing device operated by the frequency-divided clock signal at the timing of the pulse of the frequency-divided clock signal among the pulses of the input clock signal, the timing of the pulse of the frequency-divided clock signal being specified using the toggle signal.