An analog signal generating source comprising two or more digital-to-analog converters (DAC) combined to generate one or more frequency components. The analog signal source comprises a first path for generating substantially low frequency signals, the first path comprising a first one of the DACs; and a second path for generating substantially high frequency signals, the second path comprising a second one of the DACs. The analog signal source also comprises a data processor for processing an input signal and providing the processed input signal to the first and second paths; a combining circuit configured to combine outputs of the first and second paths into the source signal; a feedback portion configured to sense the source signal; and a servo loop configured to use the sensed source signal to adjust as need to maintain the source signal to substantially agree with the input signal.

One embodiment provides a digital-to-analog converter that includes an output amplifier configured to be powered with a controllable power supply voltage and a ground reference voltage. The output amplifier is configured to generate an analog output signal having a dynamic range centered on a common-mode voltage. The output amplifier includes a common-mode adaptation circuit configured to position a level of the common-mode voltage at a level located in a middle portion of an interval of voltages located between the power supply voltage and the ground reference voltage, according to an effective level of the power supply voltage.

A system may have a multiplexer and a controller. For a transition from a first pair of bits in first data provided to digital-to-analog converters (DACs) to a second pair of bits in second data, the controller may determine whether the transition is of a first type or of a second type, and in response to determining that the transition is of the first type, control the multiplexer to output the second pair of bits to the DACs. In response to determining that the transition is of the second type and the second pair of bits are to be swapped, the controller may control the multiplexer to output a swapped pair of bits to the DACs. Data output by the multiplexer based on the second data has a predetermined number of bits that have binary values different from those of corresponding bits in the first data.

In an embodiment a digital-to-analog converter includes a plurality of first capacitors, each having a first electrode and a second electrode, wherein the second electrodes are connected together and are connected to an inverting input of a first amplifier stage having its non-inverting input coupled to ground, a plurality of first switches, each of the first capacitors having its first electrode connected to a corresponding one of the first switches, wherein each of the first switches is configured to occupy a first state where the first electrode of a corresponding first capacitor is coupled to a first reference voltage and occupy a second state where the first electrode of the corresponding first capacitor is coupled to a second reference voltage different from the first reference voltage, a capacitive feedback circuit connected between the inverting input and an output of the first amplifier stage, the capacitive feedback circuit including at least one second capacitor and a controller.

A measurement system includes a gain chain configured to amplify an analog input signal; a range selector configured to select a gain between the analog input signal and a plurality of analog-to-digital converter (ADC) outputs from a plurality of ADCs, wherein each ADC output has a path, and a gain of each output path is made up of a plurality of gain stages in the gain chain; and a mixer configured to combine the plurality of ADC outputs into a single mixed output.

The present disclosure relates to compensating for temperature variation of a mixer. Embodiments herein may include performing a single-point Fast Fourier Transform (FFT) (or complex downconversion with DC average) for a number of samples to obtain a transform for each of the number of samples, phase aligning a set of phases associated with each transform, and averaging each transform to generate an analog-to-digital converter (ADC) power value. Further, the disclosed embodiments may include generating a compensation value based on the analog-to-digital converter power value and applying the compensation value to the calibration circuit of the mixer to compensate for a second-order intermodulation product.

A reference buffer with wide output voltage and current range is provided. A reference buffer includes an error amplifier comprising a first input, a second input, and a first output, wherein the amplifier is configured to generate an output signal indicative of an error between an output reference signal and an internal reference signal. The reference buffer further includes a first voltage follower circuit configured to generate the output reference signal based, at least in part, on the output signal of the error amplifier, wherein the first voltage follower comprises a third input and a second output, and wherein the second output is coupled to the second input of the error amplifier.

A noise filtering circuit, a digital to analog converter and an electronic device are provided. The noise filtering circuit comprises a first amplifier configured to receive a bias voltage at a first input terminal, receive a bias output voltage at a second input terminal though a feedback path, and compensate for a difference between the bias voltage and the bias output voltage; a first transistor connected to an output of the first amplifier and having a gate to which an off-voltage is applied; a first capacitor connected to the first transistor; a second capacitor connected to the output of the first amplifier; a second transistor connected to the second capacitor and having a gate to which an off-voltage is applied, and a second amplifier having an input terminal connected to the first capacitor and a second input terminal connected to the second transistor.