A circuit includes a nonlinear analog-to-digital converter (ADC) configured to provide a first digital output based on an analog input signal. The circuit also includes a linearization circuit having a lookup table (LUT) memory configured to store initial calibration data. The linearization circuit is coupled to the nonlinear ADC and is configured to: determine updated calibration data based on the initial calibration data; replace the initial calibration data in the LUT memory with the updated calibration data; and provide a second digital output at a linearization circuit output of the linearization circuit based on the first digital output and the updated calibration data.

An A/D converter includes: a first reference voltage unit that generates a temperature-compensated reference voltage; a second reference voltage unit that generates a second reference voltage calibrated with the reference voltage; an integration unit that generates an integrated voltage obtained by integrating unit voltages using any one of the reference voltage, the second reference voltage, and a ground voltage as an initial value during calibration; a comparator that compares the integrated voltage with a threshold voltage and outputs a determination signal; a calibration control unit that measures an integration time until the integrated voltage exceeds the threshold voltage from the initial value during calibration and calibrates the unit voltages and an offset voltage of the comparator; and a conversion control unit that converts an input voltage into a digital value using a conversion integration time which is the integration time when the input voltage is an initial value and the second reference voltage during conversion.

A calibrating device can mitigate the static mismatch error of a digital-to-analog converter (DAC), and includes a digital code generating circuit, the DAC, an analog-to-digital converter (ADC), a filter circuit, an indicating circuit, and a statistical circuit. The digital code generating circuit generates a digital code of N digital codes. The DAC generates an analog signal corresponding to one of N signal levels according to the digital code. The ADC generates a digital signal according to the analog signal. The filter circuit generates a gradient value according to the difference between the digital code and the digital signal. The indicating circuit generates a selection signal according to the digital code. The statistical circuit learns from the selection signal that the gradient value is corresponding to a K.sup.th digital code of the N digital codes, and determines whether the K.sup.th digital code should be adjusted according to the gradient value.

A light emitting device driving circuit according to the present disclosure includes a sawtooth waveform generating unit for generating a sawtooth waveform voltage having a sawtooth waveform voltage change based on at least two reference signals to be input and a comparison unit for comparing an analog signal voltage with the sawtooth waveform voltage. The light emitting device driving circuit drives a light emitting device based on the comparison result of the comparison unit. Accordingly, a comparison operation using a sawtooth waveform voltage having a waveform which is not disturbed is performed.

An oscillator-based sensor interface circuit comprises at least two oscillators, at least one of which is arranged for receiving an electrical signal representative of an electrical quantity being a converted physical quantity, phase detection means arranged to compare output signals of the at least two oscillators and for outputting a digital phase detection output signal in accordance with the outcome of the comparing, a feedback element arranged for converting a representation of the digital phase detection output signal into a feedback signal used directly or indirectly to maintain a given relation between oscillator frequencies of the at least two oscillators, detection means for detecting a difference between the at least two oscillators; and at least one tuning element arranged for receiving the detected difference and for tuning at least one characteristic of the oscillator-based sensor interface circuit.

A pipeline ADC comprising an ADC segment and a digital backend coupled to the ADC segment. In some examples the ADC is configured to receive an analog signal, generate a first partial digital code representing a first sample of the analog signal, and generate a second partial digital code representing a second sample of the analog signal. In some examples the digital backend is configured to receive the first and second partial digital codes from the ADC segment, generate a combined digital code based at least partially on the first and second partial digital codes, determine a gain error of the ADC segment based at least partially on a first correlation of a PRBS with a difference between the first and second partial digital codes, and apply a first correction to the combined digital code based at least partially on the gain error of the ADC segment.

A test and measurement instrument includes one or more channels to receive a signal under test, each channel comprising an input port, a filter, and a sampler, at least one analog-to-digital converter (ADC), the at least one ADC having two pipes connected to the sampler of one of the one or more channels, the at least one ADC to produce digital samples of the signal at a sample rate, and one or more processors configured to execute code that causes the one more processors to acquire a spectrum of the digital samples for each pipe in the at least one ADC, and use the spectrums of the digital samples for each pipe in the at least one ADC to reconstruct the spectrum of the signal under test. A method of operating a test and measurement instrument, and a method a method of calibrating a test and measurement instrument is included.

An analog-to-digital converter of one embodiment in the present disclosure may comprise a first conversion unit generating an internal clock signal, generating a first digital code and a residual signal by converting an input signal in a successive approximation register (SAR) method in response to the internal clock signal and generating a flash clock signal in response to an external clock signal, a second conversion unit generating a second digital code by converting the residual signal in a flash method in response to the flash clock signal, and an output circuit generating an output digital signal in response to the first digital code and the second digital code.

A cancellation circuit includes a limiter connected to an output of a first transmitter power amplifier that converts in input sinewave to a digital square wave and a digital to time converter (DTC) connected to the limiter. A RF digital to RF converter is connected to the DTC that converts the digital square wave input into an analog RF output. A cancellation amplifier with an input receives an output from the RF digital to RF converter and has an output connected to an output of a second transmitter power amplifier. The cancellation amplifier produces a cancellation signal to cancel an interference signal at the output of the second transmitter power amplifier from the output of the first transmitter power amplifier. A power detector is connected to the output of the second power amplifier that produces a power value detected at the output of the second power amplifier.

An analog signal generation device according to the present invention includes a DA converter that adjusts a signal level of a digital signal according to a DAC correction amount and then converts the digital signal into an analog signal, a detector that detects the analog signal and outputs a detection signal, a storage unit that stores a characteristic equation for calculating the DAC correction amount, and a control unit, in which in a case where the differential voltage when the digital signal having a signal level of a predetermined value is input to the DA converter is larger than a threshold value, the control unit calculates a new DAC correction amount based on the differential voltage by using the characteristic equation, and in a case where the differential voltage does not fall within the threshold value, the control unit corrects the characteristic equation.