A semiconductor device is provided that includes an amplification circuit, a downstream circuit, and a clipping circuit. The amplification circuit includes a sampling capacitor, a feedback capacitor, and an operational amplifier circuit. The sampling capacitor holds air input signal on which sampling is performed, as a signal whose reference is a first reference voltage. The signal that is held in the sampling capacitor is transferred to the feedback capacitor. The operational amplifier circuit amplifies the signal that is held in the sampling capacitor, according to a ratio between values of the sampling capacitor and the feedback capacitor, and outputs the amplified signal, as a signal whose reference is a second reference voltage. The clipping circuit limits a voltage of an output signal of the operational amplifier circuit to a predetermined voltage or below.

A digital microphone includes a first modulation path having an input for receiving an analog input signal and an output for generating a first digital signal; a second modulation path having an input for receiving the analog input signal and an output for generating a second digital signal; a summing circuit having a first input for receiving the first digital signal, a second input for receiving the second digital signal, and an output for generating a digital calibration path signal; and a difference circuit having a first input for receiving the first digital signal, a second input for receiving the second digital signal, and an output for generating a digital signal path signal.

A circuit includes a nonlinear analog-to-digital converter (ADC) configured to provide a first digital output based on an analog input signal. The circuit also includes a linearization circuit having a lookup table (LUT) memory configured to store initial calibration data. The linearization circuit is coupled to the nonlinear ADC and is configured to: determine updated calibration data based on the initial calibration data; replace the initial calibration data in the LUT memory with the updated calibration data; and provide a second digital output at a linearization circuit output of the linearization circuit based on the first digital output and the updated calibration data.

A digital/analog converter (DAC) includes a reference current generator including an internal resistor, and configured to generate reference current according to a resistance value of the internal resistor and a reference voltage, a digital gain block configured to generate a calibrated digital input signal that is obtained by adjusting a digital gain of a digital input signal based on a ratio between a reference resistance value and a resistance value of the internal resistor, and a conversion circuit configured to convert the calibrated digital input signal into an analog output signal, based on the reference current.

An analog-to-digital conversion (ADC) block includes: an amplifier block configured to receive two analog input signals and a primary-precision configuration signal and generate a first pair of differential signals by amplifying the two analog input signals according to a primary-precision gain that is programmably set by the primary-precision configuration signal; a configuration block configured to receive a fractional-precision configuration signal and generate a second pair of differential signals by amplifying the first pair of differential signals according to a fractional-precision gain that is programmably set by the fractional-precision configuration signal; and a differential analog-to-digital converter (ADC) including a voltage-controlled oscillator (VCO), two counters, and an error generator block. The VCO receives the second pair of differential signals and generates two pulse signals having frequencies that vary depending on a difference between the second pair of differential signals. Each of the two counters receives a respective pulse signal from the VCO and generate a digital counter value. The error generator block receives digital counter values from the two digital counters generates a digital conversion code corresponding to a difference between the digital counter values.

Embodiments disclosed herein include a method of calibrating a tool for converting photonic signals to electrical signals. In an embodiment, the method comprises connecting a calibration module to a calibrated current source, finding a transfer function for a plurality of modes with the calibration module, and storing the transfer functions in a lookup table.

A DA converter includes a first DA conversion section for obtaining an analog output signal in accordance with a digital input signal value, and a second DA conversion section for obtaining an analog gain control output signal in accordance with a digital gain control input signal value. In the DA converter, the gain control of the analog output signal generated by the first DA conversion section is performed on the basis of the gain control output signal generated by the second DA conversion section.

A method of fabricating an electronic device is provided, where the electronic device includes a port, an A/D converter, a memory, and a determination circuit. The determination circuit is configured to determine whether or not there is an abnormality by comparing an A/D converted value as a result of the A/D converter converting a voltage based on a power-supply voltage inputted to the port with a limit value stored in the memory. The method includes a step of inputting a predetermined voltage to the port of the electronic device to be fabricated, and a step of recording an A/D converted value as a result of the A/D converter converting a voltage based on the predetermined voltage inputted to the port as the limit value in the memory.

An apparatus includes a pair of voltage-controlled oscillators (VCOs). The pair includes a first VCO with a first biasing stage receiving an input voltage signal and a first output stage coupled to the first biasing stage. The first output stage generates a first output frequency signal based on the input voltage signal. The pair also includes a second VCO. The second VCO includes a second biasing stage receiving the input voltage signal and a second output stage coupled to the second biasing stage. The second output stage generates a second output frequency signal based on the input voltage signal.

A piecewise linear current-mode digital-to-analog converter circuit approximates an exponential output current over a range of input codes by generating linearly varying currents with different slopes of different ranges of the input codes. The piecewise linear current-mode digital-to-analog converter circuit includes a current generator circuit that generates the output current based on a reference voltage and a feedback signal. A variable resistance circuit is used to generate the feedback signal using the output current. Respective values of the reference voltage and the variable resistance circuit vary as a function of the input code.