According to one embodiment, a converter array includes a first substrate, multiple sets of a plurality of analog-digital converters and a switch. The multiple sets are arranged on the first substrate in array. The switch is configured to switch a connection relationship between the plurality of analog-digital converters to process signals from photodiodes smaller in number than the analog-digital converters.

An analogue to digital converter is provided for digital imaging devices, in which a pixel column is sampled by a respective capacitor.

In a reset phase of operation, each pixel in the row under consideration is reset, and an operational amplifier operating in a voltage follower mode is coupled to all the sampling capacitors in parallel to obtain the reset values of the pixels sensors of that row, and the in an imaging phase of operation, the inverting input of the operational amplifier operating in a comparator mode is coupled to each capacitor in turn after activating the respective pixel sensor, while exposing the non inverting signal to an analog ramp reference voltage so that the timing of the toggling of the operational amplifier reflects the value of the pixel under consideration, corrected for the reset value.

An analog-to-digital conversion circuit includes a convertor configured to perform a first comparison operation for sensing a noise based on a reset signal and to perform a second comparison operation for sensing raw data to output data which is obtained by removing the noise from the raw data, and a ramp voltage generator configured to generate a ramp voltage used for the first comparison operation and the second comparison operation and to output the ramp voltage to the convertor. The ramp voltage generator includes a first current source for supplying a bias current for generating the ramp voltage in response to a first control signal, a second current source for supplying a boost current for generating the ramp voltage in response to a second control signal, and a generation circuit for generating the ramp voltage based on the bias current and the boost current.

A solid-state imaging device includes: a pixel unit that outputs a pixel signal corresponding to an amount of incident light; an A/D converter that performs A/D conversion on the pixel signal; and a D/A conversion circuit that generates a reference signal to be used by the A/D converter. The D/A conversion circuit includes a first buffer circuit that outputs a base voltage VTOP for generating the reference signal, and the first buffer circuit includes a differential pair circuit including a first transistor and a second transistor, and a suppression circuit that suppresses a variation in the base voltage by canceling out a characteristic difference between the first transistor and the second transistor.

An analog-to-digital converting circuit includes: an analog-to-digital converter suitable for performing an analog-to-digital conversion on pixel signals of a plurality of pixels provided in a pixel array; a ramp signal generator suitable for providing a ramp signal to the analog-to-digital converter; and an auto-zero controller suitable for providing a reference voltage to the analog-to-digital converter to perform an auto-zeroing operation by using a row pixel for which a readout operation is performed by the analog-to-digital converter.

A disclosed comparator includes a comparison circuit including a differential unit that compares an input signal with a reference signal and changes a level of a signal output to a first node in accordance with a result of comparison and an amplifier unit that includes a load element and outputs a signal in accordance with a potential of the first node to a second node, and a positive feedback circuit that is connected to the second node and a third node and changes a level of a signal at the third node at a rate higher than a change rate of a level of a signal at the second node in accordance with a change in a level of a signal at the second node.

A circuit includes a comparator configured to generate a first conversion gain output signal by comparing a first pixel signal corresponding to a first conversion gain with a first ramp signal, and generate a second conversion gain output signal by comparing a second pixel signal corresponding to a second conversion gain with a second ramp signal, and a counter configured to count pulses of the first conversion gain output signal, output a counting result as a first digital signal, and determine whether an output of a second digital signal corresponding to the second conversion gain is required, based on the first digital signal. The first conversion gain is higher than the second conversion gain, and based on determining that the output of the second digital signal is not required, the counter is further configured to control the comparator such that the second conversion gain output signal is not generated.

The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device. A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.

A photoelectric conversion device includes a light receiving circuit configured to convert light into an electrical signal, a first hold circuit configured to hold a data signal which represents the electrical signal, a second hold circuit configured to hold a noise signal read out from the light receiving circuit in a reset state, a first resistive element to which a voltage corresponding to a difference between the data signal held by the first hold circuit and the noise signal held by the second hold circuit is applied, an A/D converter configured to convert an analog current flowing in the first resistive element into digital data, a second resistive element, and a temperature detection circuit configured to generate, based on a current flowing in the second resistive element, an analog output corresponding to an internal temperature of the photoelectric conversion device.

An analog-to-digital converter includes a comparator having paired differential input ends, and a first capacitor and a second capacitor each provided at respective differential input ends. The first capacitor includes a plurality of first sub-capacitors that are coupled side by side with one another, and the second capacitor includes a plurality of second sub-capacitors that are coupled side by side with one another. The plurality of first sub-capacitors and the plurality of second sub-capacitors are mixedly arranged in each column of a plurality of columns.