An A/D converter 1 includes a front stage A/D conversion unit (3) including a first A/D conversion unit (6) that receives an analog signal from a CMOS image sensor (100) and generates a first digital value (D1) and a first residual analog signal (V.sub.OPF) through a folding integration A/D conversion operation, and a second A/D conversion unit (7) that receives a first residual analog signal (V.sub.OPF) from the first A/D conversion unit (6) and generates a second digital value (D2) and a second residual analog signal (V.sub.OPC) through a cyclic A/D conversion operation, and a rear stage A/D conversion unit (4) that receives the second residual analog signal (V.sub.OPC) from the front stage A/D conversion unit (3) and generates a third digital value (D3) through an acyclic A/D conversion operation.

A modulo-based ADC implementation is provided and involves converting an input analog signal into phases of other M periodic analog reference signals based on one or more transfer functions, wherein M?2. The phase of each of the M reference signals comprises a folded signal corresponding to the input analog signal that is amplitude-folded to fall within a required amplitude range. This signal-to-phase conversion allows a modulo operation to be implemented over the input analog signal. Further, the M reference signals are used to obtain M discrete-time digital signals which, in turn, are used to obtain a digital representation of the input analog signal.

An image sensor includes; a pixel array disposed in a Bayer pattern and including pixels which respectively generate electrical charge according to received light incident, and an analog logic configured to convert an analog signal output from at least one pixel among the pixels into a first digital code using analog-to-digital conversion, and convert the first digital code into a second digital code by adjusting low-order bits of the first digital code in response to a control signal.

A modulo-based ADC implementation is provided and involves converting an input analog signal into phases of other M periodic analog reference signals based on one or more transfer functions, wherein M2. The phase of each of the M reference signals comprises a folded signal corresponding to the input analog signal that is amplitude-folded to fall within a required amplitude range. This signal-to-phase conversion allows a modulo operation to be implemented over the input analog signal. Further, the M reference signals are used to obtain M discrete-time digital signals which, in turn, are used to obtain a digital representation of the input analog signal.