The A/D converter includes a D/A conversion circuit configured to perform a D/A conversion on a DAC input digital value to output a DAC output signal, a difference output circuit for outputting difference signals based on a difference between the input signal and the DAC output signal, an A/D conversion circuit for performing an A/D conversion on the difference signals to output an ADC output digital value, and a control circuit for outputting the DAC input digital value based on the ADC output digital value. The control circuit outputs a first DAC input digital value and a second DAC input digital value different from the first DAC input digital value, and obtains ADC result data based on a first ADC output digital value obtained in accordance with the first DAC input digital value, a second ADC output digital value obtained in accordance with the second DAC input digital value, and the DAC input digital value.

A dither is an uncorrelated signal, usually pseudo-random noise injected into the input of an ADC such that a given input value of the wanted signal becomes spread over a plurality of codes. This reduces the effect of DNL and also smooths the integral non-linearity (INL) response of the ADC. The advantages of introducing dither could be obtained without having to perturb the signal input to the ADC. This avoids the introduction of additional components in the ADC. The dither can be applied to the components used to form a residue of the ADC stage within a pipelined converter. For example, a dither can be applied solely to a DAC part or different dithers can be applied to a ADC and DAC parts respectively. This allows greater flexibility of linearization of the ADC response and the formation of an analog residue by the DAC.

A low-pass and band-pass delta-sigma (??) analog-to-digital converter (ADC) device for sensor interface is disclosed. The device includes a first stage comprising a low-resolution passive integrator-based noise-shaping successive approximation register (SAR) ADC and a second stage comprising a voltage-controlled oscillator (VCO)-ADC.

In accordance with an embodiment, a method includes adding a dither signal to a first signal to generate a second signal, subtracting the dither signal from the first signal or subtracting the first signal from the dither signal to generate a third signal, performing a first sigma delta conversion of the second signal to a digital fourth signal, performing a second signal delta conversion of the third signal to a digital fifth signal, combining the digital fourth signal and the digital fifth signal to form a digital sixth signal.

An apparatus having an analog-to-digital converter with an increased effective resolution is disclosed. The apparatus includes a signal processing functional block and an analog-to-digital conversion block. The signal processing functional block includes a controller for providing a set of digital control signals according to a set of digital input signals received by the controller, a digital-to-analog converter for converting the digital control signals to a set of corresponding analog control signals, and a physical hardware unit for performing a specific function according to the analog control signals. The analog-to-digital conversion block includes an adder for adding a dither signal to an analog feedback signal originated from the physical hardware unit, an ADC for converting sums of dither signals and analog feedback signals to a set of oversampled digital control signals to be fed into the controller.

A dither is an uncorrelated signal, usually pseudo-random noise injected into the input of an ADC such that a given input value of the wanted signal becomes spread over a plurality of codes. This reduces the effect of DNL and also smooths the integral non-linearity (INL) response of the ADC. The advantages of introducing dither could be obtained without having to perturb the signal input to the ADC. This avoids the introduction of additional components in the ADC. The dither can be applied to the components used to form a residue of the ADC stage within a pipelined converter. For example, a dither can be applied solely to a DAC part or different dithers can be applied to a ADC and DAC parts respectively. This allows greater flexibility of linearization of the ADC response and the formation of an analog residue by the DAC.

Disclosed herein are systems for calibrating an analog-to-digital converter (ADC) device, as well as related devices and methods. In some embodiments, a system for calibrating an ADC device may include an ADC device, wherein the ADC device includes an ADC and a dither source, and wherein the ADC device is to apply a set of calibration parameters to generate digital outputs. The system may also include calibration circuitry, coupled to the ADC device, to determine which of multiple sets of values of calibration parameters results in the digital outputs having the lowest amount of noise, and to cause the ADC device to apply the calibration parameters associated with the lowest noise.

The present invention provides a signal processor that improves a resolution of a phase detection without increasing a clock frequency of a controller or decreasing a frequency of an excitation signal. A signal processor 10 includes a comparator 11 that compares a signal obtained by phase modulating a carrier frequency at a rotor rotation angle of a resolver with a dither signal.

A method and system for data conversion includes an analog noise generator to generate a random, non-deterministic, analog noise signal. An adder adds the analog noise signal to an analog RF signal to produce a dithered analog signal. A first quantizer converts the analog noise signal to digital to produce a digital noise signal. A second quantizer converts the dithered analog signal to a digital equivalent signal. A digital dither adjustment module removes amplitude measurements of the digital noise signal from the digital equivalent signal to obtain a linearized digital representation of the analog RF signal.

Techniques that allow application of noise-shaped dither without applying dither at sampling, resulting in the analog-to-digital converter (ADC) circuit advantageously being balanced during acquisition. Balancing the ADC circuit at acquisition can reduce the risk of sampling digital interferences that can couple in through the references or substrates.