An A/D conversion circuit includes a comparison-reference-signal generator section configured to generate a comparison reference signal synchronized with a sampling clock signal, a comparator configured to compare a voltage of an input signal and a voltage of the comparison reference signal to thereby generate a trigger signal, a time to digital converter configured to calculate a first time digital value, and a digital-signal generator section configured to generate, based on the first time digital value and a second time digital value, a digital signal corresponding to the voltage of the input signal. The first time to digital converter includes a state transition section configured to start transition of a state based on the trigger signal and output state information, and a weight operation section configured to, in synchronization with the reference clock signal, perform, on a value based on the state information, weighting corresponding to time elapsing and perform a predetermined arithmetic operation to thereby calculate the first time digital value corresponding to the number of transition times of the state.

An imaging system according to the present disclosure includes: an imaging device that is mounted in a vehicle, and captures and generates an image of a peripheral region of the vehicle; and a processing device that is mounted in the vehicle, and executes processing related to a function of controlling the vehicle on the basis of the image. The imaging device includes: a first control line, a first voltage generator that applies a first voltage to the first control line, a first signal line, a plurality of pixels that applies a pixel voltage to the first signal line, a first dummy pixel that applies a voltage corresponding to the first voltage of the first control line to the first signal line in a first period, a converter including a first converter that performs AD conversion on the basis of a voltage of the first signal line in the first period to generate a first digital code, and a diagnosis section that performs diagnosis processing on the basis of the first digital code. The above-described processing device restricts the function of controlling the vehicle on the basis of a result of the diagnosis processing.

An image sensor for sampling a pixel signal a plurality of times during a readout time includes an analog comparator configured to compare a signal level of the pixel signal with a signal level of a target ramp signal that is any one of a plurality of ramp signals, a counter configured to output counting data based on a comparison result of the analog comparator, and a digital comparing circuit configured to compare a binary value of a target reference code corresponding to the target ramp signal with a binary value of the counting data and determine whether to output a digital signal corresponding to the counting data to a data output circuit based on a result of the comparison between the binary value of the counting data and the binary value of the target reference code.

There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

An optical light sensing device includes a detector operable to detect a light wave. The optical light sensing device also includes an integration circuit that includes an operational amplifier that is operable to reduce or cancel dark currents generated at the detector.

An image sensor includes a pixel array including first pixels and second pixels, each of the first and second pixels including photodiodes, a sampling circuit detecting a reset voltage and a pixel voltage from the first and second pixels and generating an analog signal, an analog-to-digital converter image data from the analog signal, and a signal processing circuit generating an image using the image data. Each of the first pixels includes a first conductivity-type well separating the photodiodes and having impurities of a first conductivity-type. The photodiodes have impurities of a second conductivity-type different from the first conductivity-type. Each of the second pixels includes a second conductivity-type well separating the photodiodes and having impurities of the second conductivity-type different from the first conductivity-type. A potential level of the second conductivity-type well is higher than a potential level of the first conductivity-type well.

An image sensor includes a pixel array including first pixels and second pixels, each of the first and second pixels including photodiodes, a sampling circuit detecting a reset voltage and a pixel voltage from the first and second pixels and generating an analog signal, an analog-to-digital converter image data from the analog signal, and a signal processing circuit generating an image using the image data. Each of the first pixels includes a first conductivity-type well separating the photodiodes and having impurities of a first conductivity-type. The photodiodes have impurities of a second conductivity-type different from the first conductivity-type. Each of the second pixels includes a second conductivity-type well separating the photodiodes and having impurities of the second conductivity-type different from the first conductivity-type. A potential level of the second conductivity-type well is higher than a potential level of the first conductivity-type well.

Technologies relating to implementing two-stage ramp ADCs in crossbar array circuits for high performance matrix multiplication are disclosed. An example two-stage ramp ADC includes: a transimpedance amplifier configured to convert an input signal from current to voltage; a comparator connected to the transimpedance amplifier; a switch bias set connected to the comparator; a switch side capacitor in parallel with the switch bias set; a ramp side capacitor in parallel with the switch bias set; a ramp generator connected to the comparator via the ramp side capacitor, wherein the ramp generator is configured to generate a ramp signal; a counter; and a memory connected to the comparator, wherein the memory is configured to store an output of the comparator.

Technologies relating to implementing two-stage ramp ADCs in crossbar array circuits for high performance matrix multiplication are disclosed. An example two-stage ramp ADC includes: a transimpedance amplifier configured to convert an input signal from current to voltage; a comparator connected to the transimpedance amplifier; a switch bias set connected to the comparator; a switch side capacitor in parallel with the switch bias set; a ramp side capacitor in parallel with the switch bias set; a ramp generator connected to the comparator via the ramp side capacitor, wherein the ramp generator is configured to generate a ramp signal; a counter; and a memory connected to the comparator, wherein the memory is configured to store an output of the comparator.