An apparatus, system, and method for digital-to-analog (converter) control are provided. A DAC includes a first resistor ladder including a plurality of first electrical taps into different portions of the first resistor ladder, first and second pass gate trees coupled to receive outputs from the first electrical taps, first and second buffers coupled to receive outputs from the first and second pass gate trees, respectively, a second resistor ladder coupled to receive and be biased by outputs of the first and second buffers, the second resistor ladder including a plurality of second electrical taps into different portions of the second resistor ladder, and third, fourth, and fifth pass gate trees coupled to receive outputs from the second electrical taps.

An apparatus, system, and method for digital-to-analog (converter) control are provided. A DAC includes a first resistor ladder including a plurality of first electrical taps into different portions of the first resistor ladder, first and second pass gate trees coupled to receive outputs from the first electrical taps, first and second buffers coupled to receive outputs from the first and second pass gate trees, respectively, a second resistor ladder coupled to receive and be biased by outputs of the first and second buffers, the second resistor ladder including a plurality of second electrical taps into different portions of the second resistor ladder, and third, fourth, and fifth pass gate trees coupled to receive outputs from the second electrical taps.

An electronic device may include a digital to analog converter receiving digital signals and outputting analog signals based on the received digital signals. The electronic device may also include a power source to supply current to the digital to analog converter. The digital to analog converter may include a first resistor ladder section to electrically couple an output node of the digital to analog converter to the power source via a first number of resistors in series. The digital to analog converter may also include a second resistor ladder section to electrically couple the output node to a reference voltage via a second number of resistors in series. The sum of the first number of resistors in series and the second number of resistors in series may be the same for each of the different analog signals.

Many electronic circuits rely on the ratio of one component to other components being well defined. Current flow in component can warm the component causing its electrical properties to change, for example the resistance of a resistor may increase due to self-heating as a result of current flow. The present disclosure provides a way to reduce temperature variation between components so as to reduce electrical mismatch between them or the consequences of such mismatch. This is important as even a change of resistance of, for example, 20-50 ppm in a resistor can result in non-linearity exceeding the least significant bit value of a 16 bit digital to analog converter.

In accordance with an embodiment, a digital-to-analog converter (DAC) includes: a W-2W current mirror that includes a first plurality of MOS transistors having a first width, and second plurality of MOS transistors having a second width that is twice the first width, where ones of the second plurality of MOS transistors are coupled between drains of adjacent ones of the first plurality of MOS transistors; and a bulk bias generator having a plurality of output nodes coupled to corresponding bulk nodes of the first plurality of MOS transistors, wherein the plurality of output nodes are configured to provide voltages that are inversely proportional to temperature.

An electronic control unit includes a pair of D/A conversion circuits, which performs D/A conversion processing of a pair of digital data and outputs a pair of analog signals. Each of the pair of D/A conversion circuits performs the D/A conversion processing by splitting input digital data into more-significant digital data and less-significant digital data. More-significant D/A conversion part performs analog conversion processing in accordance with the more-significant digital data by using an element string circuit, which outputs split voltages by splitting predetermined reference voltages. The more-significant conversion circuits output a maximum value and a minimum value in absolute voltage ranges, which are different from each other, in accordance with the more-significant digital data. Less-significant conversion parts perform analog conversion processing in accordance with less-significant digital data by using the maximum value and the minimum value of the different absolute voltage ranges, which are outputted from the more-significant D/A conversion parts, as reference voltages. The element string circuit is shared by the pair of D/A conversion circuits.

An electronic control unit includes a pair of D/A conversion circuits, which performs D/A conversion processing of a pair of digital data and outputs a pair of analog signals. Each of the pair of D/A conversion circuits performs the D/A conversion processing by splitting input digital data into more-significant digital data and less-significant digital data. More-significant D/A conversion part performs analog conversion processing in accordance with the more-significant digital data by using an element string circuit, which outputs split voltages by splitting predetermined reference voltages. The more-significant conversion circuits output a maximum value and a minimum value in absolute voltage ranges, which are different from each other, in accordance with the more-significant digital data. Less-significant conversion parts perform analog conversion processing in accordance with less-significant digital data by using the maximum value and the minimum value of the different absolute voltage ranges, which are outputted from the more-significant D/A conversion parts, as reference voltages. The element string circuit is shared by the pair of D/A conversion circuits.

A digital-to-analog conversion circuit, comprising: an R−2R resistive network (10) configured to be connected between an output end and a ground end; an output voltage selection unit (20) configured to be connected between the output end of the R−2R resistive network (10) and a voltage output terminal; an output voltage trimming unit (30), wherein the output voltage trimming unit (30) is provided between a 2R resistor on at least one branch of the R−2R resistive network (10) and the ground end.

In an embodiment, a circuit provided by the present invention includes a transistor connected to allow current to flow from a voltage supply to an output port. The circuit further includes a resistance ladder digital-to-analog converter (R.sub.DAC) configured to receive a digital input that indicates a voltage scaling factor. The R.sub.DAC is further configured to receive an input voltage (V.sub.B) at a voltage input port and produce an output voltage (V.sub.A). The circuit further includes an amplifier having an output port connected to a gate of the first transistor, an inverting input port receiving the output voltage (V.sub.A), and a non-inverting input connected to the output port of the first transistor.

The present disclosure describes aspects of current removal for digital-to-analog converters (DACs). In some aspects, a circuit for converting a digital input to an analog output includes a first resistor ladder having first resistors connectable to respective current sources and connected to a first output of the circuit. The circuit also includes second resistor ladder having second resistors connectable to the respective current sources and connected to a second output of the circuit. A common node is formed between common resistor terminals of the first resistor ladder and the second resistor ladder. Current removal circuitry is connected to the common node and referenced to an amount of current provided by the respective current sources. By removing current from the common node of the resistor ladders, common-mode current at outputs of the circuit can be reduced with minimal degradation of differential performance of the circuit.