H03M3/352

Suppressing signal transfer function peaking in a feedforward delta sigma converter
09564916 · 2017-02-07 ·

A modified topology for a CTDSM (referred herein as SCFF) can effectively deal with signal transfer function (STF) peaking, an inherent property of continuous time feedforward delta sigma converters. The SCFF approach involves providing an additional digital-to-analog (DAC) feedback path to the input of the second integrator (incurring an additional DAC in the circuitry, converting the output of the quantizer into an analog signal and feeding the analog signal to the input of the second integrator). Furthermore, the SCFF approach involves providing two feed-ins: a first feed-in to the input of the second integrator and a second feed-in to the input of the third integrator. The first feed-in can be negative. Advantageously, the modified continuous time delta sigma modulator implementing this approach alleviates some of the peaking issues in the signal transfer function while still enjoy low power consumption.

System and methods for sigma-delta modulation

A device and method for sigma-delta modulation may include an input signal and a plurality of integrators. The output of the integrators and a data input may be input to an adder, the sum output to be input to a quantizer to generate a quantized output signal. A reset input to the first integrator may be asserted during a first sample of the quantized output signal to reduce the signal discontinuity at the input of the first integrator, which improves the stability of the sigma-delta modulator.

Multichannel transmit and/or receive system comprising at least N parallel processing channels and method for decorrelating quantization noise in such a system

A multichannel transmit and/or receive system, each channel includes a DAC and a sigma-delta modulator the transfer function of which is expressed thus:
OUT(z)=IN(z).Math.FTS(z)+Q(z).Math.FTB(z),
where OUT is the output signal of the sigma-delta modulator, IN is the input signal of the sigma-delta modulator, FTS is the transfer function of the input signal, Q is the quantization noise and FTB is the transfer function of the quantization noise, the second terms of the transfer function of the sigma-delta modulator only being distinct from one another for two channels Vi, Vj, in order to decorrelate the quantization noise of distinct channels, the first term of said transfer function for channel Vi being equal to the first term of said transfer function for channel Vj.

ADC error compensation using powers of ADC output

A device may include an input terminal configured to receive an analog input signal. A device may include an output terminal configured to output a digital signal x, wherein the digital signal x includes a digital approximation of the analog input signal. A device may include an error correction system connected to the ADC, the error correction system including a first input terminal configured to receive an Nth powered version of the digital signal x, wherein N is a whole number equal to or greater than two, wherein the error correction system is configured to: use the Nth powered version of the digital signal x to determine a correction value; and modify the digital signal x to generate a corrected digital signal by applying the correction value to compensate for analog-to-digital conversion errors occurring within the ADC.

Continuous-time data converter with digital multi-stage noise shaping subconverter

In accordance with an embodiment, a continuous-time delta-sigma analog-to-digital converter (ADC) includes: a continuous-time loop filter having an input coupled to an input of the continuous-time delta-sigma ADC; a multi-bit quantizer coupled to an output of the continuous-time loop filter; a 1-bit or 1.5 bit digital delta-sigma modulator having an input coupled to an output of the multi-bit quantizer and an output coupled to an input of the continuous-time loop filter; and a multi-bit digital delta-sigma modulator configured to requantize quantization error of the 1-bit or 1.5-bit digital delta-sigma modulator and having an output coupled to the input of the continuous-time loop filter and to an input of the 1-bit or 1.5-bit digital delta-sigma modulator.

Delta sigma modulation circuit, digital transmission circuit, and digital transmitter

Disclosed is a circuit including: a loop filter to perform digital processing on a signal inputted from an outside; multiple quantizers to output 1-bit signals corresponding to magnitude relationships with thresholds on the basis of the signal after the digital processing by the loop filter; and an averaging circuit to calculate the average of the values shown by the signals outputted by the quantizers, and to feed back the average to the loop filter, in which the thresholds used by the quantizers differ from one another.