An integrator circuit includes: an operational amplifier; a first capacitor coupled to an input of the operational amplifier; a second capacitor coupled in parallel to the first capacitor so that a first terminal of the first capacitor is configured to be electrically coupled to a first terminal of the second capacitor by a first switch; and a second switch configured to electrically couple the first terminal of the second capacitor to a second terminal of the first capacitor.

Reference scaling, op amp balancing and chopper stabilization techniques for delta-sigma modulators of analog-to-digital converters are provided. For reference scaling, unit elements in a feedback digital-to-analog (DAC) converter are driven by a reference voltage or disconnected from active circuitry to realize three DAC levels. While disconnected, the unit elements deliver no charge to the device which results in power saving and a reduction in thermal noise. Op amp balancing involves down-sampling the quantizer output followed by up-sampling on the feedback path and filtering to hold a DAC value of the signal for a duration of a sampling period to generate the feedback signal. Chopper stabilization is performed by chopping an operational transconductance amplifier of the integrator at a chopping frequency equal to the sampling frequency.

A DA conversion device includes a level determiner determining whether a level of the digital signal or the analog signal is higher than a predetermined threshold value; a DA converter including plural capacitors, an operational amplifier which generates the analog signal, and a plurality of transistors which connects each of the plural capacitors to a first or a second reference voltage according to the digital signal in a first connection state and connects the plural capacitors between an input terminal and an output terminal of the operational amplifier in a second connection state; and a setting part which receives a clock signal and sets gate-source voltages of the plurality of transistors such that the plurality of transistors is in the first connection state in a first period of the clock signal and the plurality of transistors is in the second connection state in a second period of the clock signal.

A feedback divider in a mixed-signal circuit is modulated by a frequency control word controlling a delta-sigma modulator. An accumulated quantization error from the delta-sigma modulator is compared to a residual error in the circuit by a Least-Mean Square (LMS) correlator for gain calibration to adjust for linear errors. Upper bits of the accumulated quantization error access a lookup table to find two outputs of the compensation function that are interpolated between using lower bits of the accumulated quantization error. The interpolated result is an adjustment subtracted from the loop to compensate for non-linear errors. A set of orthogonal kernels is generated from the accumulated quantization error and calibrated using another LMS correlator and inverse transformed to generate updates to the non-linear compensation function in the lookup table. The kernels can be Walsh Hadamard (WH) and the inverse transformer an inverse WH transformer.

A DA conversion device includes a level determiner determining whether a level of the digital signal or the analog signal is higher than a predetermined threshold value; a DA converter including plural capacitors, an operational amplifier which generates the analog signal, and a plurality of transistors which connects each of the plural capacitors to a first or a second reference voltage according to the digital signal in a first connection state and connects the plural capacitors between an input terminal and an output terminal of the operational amplifier in a second connection state; and a setting part which receives a clock signal and sets gate-source voltages of the plurality of transistors such that the plurality of transistors is in the first connection state in a first period of the clock signal and the plurality of transistors is in the second connection state in a second period of the clock signal.

The disclosure provides a circuit. The circuit includes an amplifier and a digital to analog converter (DAC). The amplifier receives a reference voltage at an input node of the amplifier. The DAC is coupled to the amplifier through a refresh switch. The DAC includes one or more current elements. Each current element of the one or more current elements receives a clock. The DAC includes one or more switches corresponding to the one or more current elements. A feedback switch is coupled between the one or more switches and a feedback node of the amplifier. The DAC provides a feedback voltage at the feedback node of the amplifier.

Analog circuits are often non-linear, and the non-linearities can hurt performance. Designers would trade off power consumption to achieve better linearity. An efficient and effective calibration technique can address the non-linearities and reduce the overall power consumption. A dither signal injected to the analog circuit can be used to expose the non-linear behavior in the digital domain. To detect the non-linearities, a counting approach is applied to isolate non-linearities independent of the input distribution. The approach is superior to and different from other approaches in many ways.

A semiconductor device includes a signal input circuit configured to select one of the plurality of differential sensor signals according to a channel selection signal; an amplifier circuit configured to amplify an output of the signal input circuit; and an analog-to-digital converter (ADC) configured to convert an output of the amplifier circuit into a digital value, wherein each of the plurality of sensor signals is a differential signals and the signal input circuit changes polarity of an output signal thereof according to a first chopping signal, and wherein the ADC includes a delta-sigma modulator configured to generate a bit stream from an output of the amplifier circuit; an output chopping circuit configured to adjust phase of the bit stream according to the first chopping signal; and a filter configured to filter an output of the output chopping circuit and to output the digital value.

A feedback divider in a mixed-signal circuit is modulated by a frequency control word controlling a delta-sigma modulator. An accumulated quantization error from the delta-sigma modulator is compared to a residual error in the circuit by a Least-Mean Square (LMS) correlator for gain calibration to adjust for linear errors. Upper bits of the accumulated quantization error access a lookup table to find two outputs of the compensation function that are interpolated between using lower bits of the accumulated quantization error. The interpolated result is an adjustment subtracted from the loop to compensate for non-linear errors. A set of orthogonal kernels is generated from the accumulated quantization error and calibrated using another LMS correlator and inverse transformed to generate updates to the non-linear compensation function in the lookup table. The kernels can be Walsh Hadamard (WH) and the inverse transformer an inverse WH transformer.

A feedback divider in a mixed-signal circuit is modulated by a frequency control word controlling a delta-sigma modulator. An accumulated quantization error from the delta-sigma modulator is compared to a residual error in the circuit by a Least-Mean Square (LMS) correlator for gain calibration to adjust for linear errors. Upper bits of the accumulated quantization error access a lookup table to find two outputs of the compensation function that are interpolated between using lower bits of the accumulated quantization error. The interpolated result is an adjustment subtracted from the loop to compensate for non-linear errors. A set of orthogonal kernels is generated from the accumulated quantization error and calibrated using another LMS correlator and inverse transformed to generate updates to the non-linear compensation function in the lookup table. The kernels can be Walsh Hadamard (WH) and the inverse transformer an inverse WH transformer.