A method for Signal-to-Noise and Distortion Ratio (SNDR) improvement through optimal Digital-to-Analog-Converter (DAC) element selection includes randomizing an order of a plurality of unit elements of a DAC, wherein each of the unit elements is controlled by a respective one of a plurality of digital inputs of the DAC. The plurality of digital inputs is sequentially asserted over at least a subset of a full set of the digital inputs to generate a plurality of analog values of an output of the DAC. A first SNDR of the DAC is measured from the plurality of analog values. A maximum SNDR, corresponding to an optimal order, is determined from the first SNDR and at least one previously measured SNDR. The optimal order of the unit elements of the DAC is stored in a memory to define connections between the digital inputs and the respective unit elements based on the optimal order.

In accordance with an embodiment, a digital microphone interface circuit includes a delta-sigma analog-to-digital converter (ADC) having an input configured to be coupled to a microphone, a digital lowpass filter coupled to an output of the delta-sigma ADC, and a digital sigma-delta modulator coupled to an output of the digital lowpass filter. The delta-sigma ADC, the digital lowpass filter, and the digital sigma-delta modulator are configured to operate at different sampling frequencies.

Method and apparatus for nonlinear signal processing include mitigation of outlier noise in the process of analog-to-digital conversion and adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control. Methods, processes and apparatus for real-time measuring and analysis of variables include statistical analysis and generic measurement systems and processes which are not specially adapted for any specific variables, or to one particular environment. Methods and corresponding apparatus for mitigation of electromagnetic interference, for improving properties of electronic devices, and for improving and/or enabling coexistence of a plurality of electronic devices include post-processing analysis of measured variables and post-processing statistical analysis.

Systems and methods according to one or more embodiments are provided for improving noise performance in a delta sigma modulator comprising an adder, quantizer and nth order filter. The adder is operable to receive an input signal and a feedback signal, and output a modified input signal. The quantizer is operable to receive the modified input signal and output a quantized output signal, the quantized output signal having a corresponding quantization error. The nth order filter is operable to receive a quantization error value and generate the feedback signal, the nth order filter comprising a first memory element having a first error value, a second memory element having a second error value, and a gravity component operable to converge the first error value and the second error value when the input signal is approximately zero.

There is a presented a system for setting a noise transfer function comprising an input configured to receive an analog signal; a quantizer configured to quantize the analog signal to produce a digital signal; a preamplifier configured to adjust at least the amplitude the analog signal; and a resonator configured to adjust at least the amplitude of the analog signal, an output of the resonator being coupled to an output of the preamplifier, the system providing greater attenuation to the analog signal in a frequency band determined by the preamplifier and the resonator.

To convert a first stage input to a digital output, a delta-sigma modulator, an analog-to-digital converter and an associated signal conversion method based on an MASH structure are provided. The analog-to-digital converter includes the delta-sigma modulator and a sample and hold circuit. The delta-sigma modulator includes a first signal converter, a second signal converter and a digital cancellation logic. The first signal converter converts the first stage input to a first converted output. The first signal converter shapes a first stage quantization error to generate a second stage input. The first stage input and the second stage input are analog signals. The second signal converter converts the second stage input to a second converted output. The digital cancellation logic generates a digital output according to the first converted output and the second converted output.

The present invention relates to nonlinear signal processing, and, in particular, to method and apparatus for mitigation of outlier noise in the process of analog-to-digital conversion. More generally, this invention relates to adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control, and to methods, processes and apparatus for real-time measuring and analysis of variables, including statistical analysis, and to generic measurement systems and processes which are not specially adapted for any specific variables, or to one particular environment. This invention also relates to methods and corresponding apparatus for mitigation of electromagnetic interference, and further relates to improving properties of electronic devices and to improving and/or enabling coexistence of a plurality of electronic devices. The invention further relates to post-processing analysis of measured variables and to post-processing statistical analysis.

A delta-sigma modulator is provided with: a loop filter 30; a quantizer 36 that generates quantized data on the basis of an output from the loop filter 30; an internal path 42 connected to the loop filter 30 or the quantizer 36; and a compensator 38 that provides, to the internal path 42, a compensation signal for compensating for distortion that occurs in a frequency component at a target frequency, the frequency component being among frequency components of a pulse train corresponding to the quantized data.

The present disclosure describes a digital-to-analog converter (DAC) comprising a programmable integrated circuit, a resampler, and a clock. The programmable integrated circuit may be configured to perform delta-sigma modulation to convert a digital signal to a coarse representation of an analog signal. The coarse representation of the analog signal may be sent to a first-stage of the resampler. After processing the signal, the first-stage of the resampler may pass a continuous signal to the second-stage of the resampler. The second-stage of the resampler produce a clean sampling instant for the signal that represents the point in time where the signal transitions from discrete time to continuous time. The analog signal may then be outputted to one or more receivers.

Circuits and methods for inter-symbol interference compensation are described. These circuits and methods may be used in connection with delta-sigma analog-to-digital converter. During a sensing phase, a value indicative of the inter-symbol interference may be sensed. The value may be obtained by (1) causing the ADC to generate a first number of transitions during a first time interval; (2) causing the ADC to generate a second number of transitions during a second time interval; (3) sensing the number of logic-0s and logic-1s occurring in the first and second time intervals; and (4) computing the value based at least in part on the number of logic-0s and logic-1s occurring in the first and second time intervals. During a compensation phase, inter-symbol interference may be compensated based on the value obtained in the sensing phase.