Sensing electronics may be used to measure capacitance of components, such as speakers in mobile devices. A sensing circuit may include a charge-sense front end with sine wave excitation, an analog-to-digital conversion block, and a digital demodulator. The component being measured by the sensing electronics may be excited by a high-frequency sine wave excitation. The digitization of the output from the component may be performed using a bandpass filter synchronized with the excitation signal by centering the bandpass filter near (e.g., within 5% of) the frequency of the excitation signal.

A digital transmitter includes baseband interfaces to generate digital baseband signals with baseband frequencies, digital-upconverting stages to upconvert the baseband frequencies to first radio frequencies having a predetermined frequency range, a M-Band M modulator to modulate the up-stage signals based on noise shaping and noise quantization processes, delay registers to align phases of the modulated up-stage signals, a noise canceler to generate noise canceling signals with a converted polarity, a Switch Mode Power Amplifier to amplify the phase aligned modulated up-stage signals up to a predetermined power level, a linear power amplifier to amplify the noise canceling signals up to the predetermined power level, a power combiner to combine to generate transmitting signals by combining the amplified phase aligned modulated up-stage signals and the amplified noise canceling signals, and an antenna to transmit the transmitting signals.

A delta-sigma modulator is provided with: a loop filter 30; a quantizer 36 that generates quantized data on the basis of an output from the loop filter 30; an internal path 42 connected to the loop filter 30 or the quantizer 36; and a compensator 38 that provides, to the internal path 42, a compensation signal for compensating for distortion that occurs in a frequency component at a target frequency, the frequency component being among frequency components of a pulse train corresponding to the quantized data.

The disclosure provides a receiver with high dynamic range. The receiver includes a photodiode that generates a current signal. A coupling capacitor is coupled to the photodiode, and generates a modulation signal in response to the current signal received from the photodiode. A sigma delta analog to digital converter (ADC) is coupled to the coupling capacitor, and generates a digital data in response to the modulation signal. A digital mixer is coupled to the sigma delta ADC, and generates an in-phase component and a quadrature component corresponding to the digital data. A processor is coupled to the digital mixer, and processes the in-phase component and the quadrature component corresponding to the digital data.

A signal modulation device comprising: an input for receiving a complex input signal (106) comprising an in-phase component signal and a quadrature-phase component signal, a sigma-delta modulator (110) for modulating the complex input signal at an oversampling clock rate (F1) into an intermediary signal (112), a numerical oscillator (60) for generating a phase signal (61) oscillating at a selected carrier frequency (FC), wherein the phase signal takes a finite number of quantized states, and a symbol mapping table (114) comprising a predefined quantized symbol for each quantized complex state of the intermediary signal and each quantized state of the phase signal, and operates at each oversampling clock period (F1) to select a quantized symbol (116) as a function of a current quantized complex state of the intermediary signal (112) and a current quantized state of the phase signal (61).

A method for measuring capacitance may include integrating charge with a charge integrator having a charge integrator input and output, filtering, with a loop filter having a loop filter input coupled to the charge integrator output and having a loop filter output, a first signal generated at the charge integrator output, quantizing, with quantizer having a quantizer input coupled to the loop filter output and a having quantizer output, a second signal generated at the loop filter output, processing, with a first feedback path having a first feedback path input coupled to the quantizer output and a first feedback path output coupled to the charge integrator input, a low-frequency spectrum of a quantizer output signal, and processing, with a second feedback path having a second feedback path input coupled to the quantizer output and a second feedback path output coupled downstream in a signal path of the apparatus relative to the charge integrator, a high-frequency spectrum of the quantizer output signal.

Provided, among other things, is an apparatus for digitally processing a discrete-time signal that includes: an input line for accepting an input signal, processing branches coupled to the input line, and an adder coupled to outputs of the processing branches. First and second lowpass filters, each having a frequency response with a magnitude that varies approximately with frequency according to a product of raised functions, are included within baseband processors in such processing branches.

A data sensing circuit includes one or more drive sense circuits operably coupled to a plurality of data sources. The one or more drive sense circuits produces a plurality of digital sense signals regarding the plurality of data sources at an oversampling rate. The data sensing circuit further includes a digital filtering circuit operably coupled to receive, in parallel, at least some of the plurality of digital sense signals and generate, in a serial manner, a plurality of affect values from the least some of the plurality of digital sense signals.

Provided, among other things, is an apparatus for digitally processing a discrete-time signal that includes: an input line for accepting an input signal, processing branches coupled to the input line, and an adder coupled to outputs of the processing branches. First and second lowpass filters, each having a frequency response with a magnitude that varies approximately with frequency according to a product of raised functions, are included within baseband processors in such processing branches.

A distortion compensator 10 acquires an asymmetric component included in a 1-bit pulse train outputted from a DSM 6 on the basis of an analog signal as an output signal obtained from the 1-bit pulse train, and an IQ signal as an input signal to be inputted to the DSM 6, and performs distortion compensation on the basis of the asymmetric component. The distortion compensator 10 is caused to store therein asymmetric component data representing the acquired asymmetric component. When acquiring the asymmetric component, the distortion compensator 10 acquires, as an asymmetric component, a difference between an output baseband signal obtained by orthogonally demodulating the analog signal as the output signal, and an input baseband signal before being orthogonally modulated.