Methods, apparatus, systems and articles of manufacture are disclosed for source classification using HDMI audio metadata. An example apparatus includes a metadata extractor to extract values of audio encoding parameters from HDMI metadata obtained from a monitored HDMI port of a media device, the HDMI metadata corresponding to media being output from the monitored HDMI port; map the extracted values of the audio encoding parameters to a first unique encoding class (UEC) in a set of defined UECs, different ones of the set of defined UECs corresponding to different combinations of possible values of the audio encoding parameters capable of being included in the HDMI metadata; and identify a media source corresponding to the media output from the HDMI port based on one or more possible media sources mapped to the first UEC.

Methods, apparatus, systems and articles of manufacture are disclosed for source classification using HDMI audio metadata. An example apparatus includes a metadata extractor to extract values of audio encoding parameters from HDMI metadata obtained from a monitored HDMI port of a media device, the HDMI metadata corresponding to media being output from the monitored HDMI port; map the extracted values of the audio encoding parameters to a first unique encoding class (UEC) in a set of defined UECs, different ones of the set of defined UECs corresponding to different combinations of possible values of the audio encoding parameters capable of being included in the HDMI metadata; and identify a media source corresponding to the media output from the HDMI port based on one or more possible media sources mapped to the first UEC.

According to one embodiment, a dividing circuit divides a first bit string into second bit strings and outputs the divided second bit strings. The dividing circuit includes first, second, and third blocks. The first block executes first operation for each bit of a third bit string in the first bit string. The first operation is to calculate a head bit of a succeeding symbol when one bit is assumed to be a head of one symbol. The second block executes second operation for each bit of the third bit string for a set number of times. The second operation is to overwrite boundary information associated with one bit with boundary information associated with a bit indicated by the boundary information. The third block divides the third bit string immediately before a second bit indicated by boundary information associated with a first bit of the third bit string.

One example includes an integrated circuit (IC). The IC includes non-volatile memory and logic. The logic is configured to receive repair code associated with a memory instance and assign a compression parameter to the repair code based on a configuration of the memory instance. The logic is also configured to compress the repair code based on the compression parameter to produce compressed repair code and to provide compressed repair data that includes the compressed repair code and compression control data that identifies the compression parameter. A non-volatile memory controller is coupled between the non-volatile memory and the logic. The non-volatile memory controller is configured to transfer the compressed repair data to and/or from the non-volatile memory.

The disclosure provides a look-up table (LUT) compression method and a LUT reading method for computation equipment and its host and device. In a LUT compression phase, the host retrieves an original data from an original LUT by using an original table address, checks the original data according to a reconstruction condition to obtain a check result (bitmap), converts the original data into a reconstructed data according to the check result, writes the reconstructed data to a compressed LUT by using a compressed table address, writes a relationship among the original table address, the compressed table address, and the check result (bitmap) to a mapping table, and stores the compressed LUT to the device. In a LUT reading phase, the host retrieves a compressed table address and the bitmap from the mapping table by using an original table address, and the device retrieves a reconstructed data from the compressed LUT by using the compressed table address, and converts the reconstructed data into an original data according to the bitmap and a reconstruction condition.

The disclosure provides a look-up table (LUT) compression method and a LUT reading method for computation equipment and its host and device. In a LUT compression phase, the host retrieves an original data from an original LUT by using an original table address, checks the original data according to a reconstruction condition to obtain a check result (bitmap), converts the original data into a reconstructed data according to the check result, writes the reconstructed data to a compressed LUT by using a compressed table address, writes a relationship among the original table address, the compressed table address, and the check result (bitmap) to a mapping table, and stores the compressed LUT to the device. In a LUT reading phase, the host retrieves a compressed table address and the bitmap from the mapping table by using an original table address, and the device retrieves a reconstructed data from the compressed LUT by using the compressed table address, and converts the reconstructed data into an original data according to the bitmap and a reconstruction condition.

Technologies for dividing work across one or more accelerator devices include a compute device. The compute device is to determine a configuration of each of multiple accelerator devices of the compute device, receive a job to be accelerated from a requester device remote from the compute device, and divide the job into multiple tasks for a parallelization of the multiple tasks among the one or more accelerator devices, as a function of a job analysis of the job and the configuration of each accelerator device. The compute engine is further to schedule the tasks to the one or more accelerator devices based on the job analysis and execute the tasks on the one or more accelerator devices for the parallelization of the multiple tasks to obtain an output of the job.

Technologies for dividing work across one or more accelerator devices include a compute device. The compute device is to determine a configuration of each of multiple accelerator devices of the compute device, receive a job to be accelerated from a requester device remote from the compute device, and divide the job into multiple tasks for a parallelization of the multiple tasks among the one or more accelerator devices, as a function of a job analysis of the job and the configuration of each accelerator device. The compute engine is further to schedule the tasks to the one or more accelerator devices based on the job analysis and execute the tasks on the one or more accelerator devices for the parallelization of the multiple tasks to obtain an output of the job.

Technologies for lifecycle management include multiple computing devices in communication with a lifecycle management server. On boot-up, a computing device loads a lightweight firmware boot environment. The lightweight firmware boot environment connects to the lifecycle management server and downloads one or more firmware images for controllers of the computing device. The controllers includes baseboard management controllers, network interface controllers, solid-state drive controllers, or other controllers. The lifecycle management server selects firmware images and/or versions of firmware images based on the controllers or the computing device. The computing device installs each firmware image to a controller memory device coupled to a controller, and in use, each controller accesses the firmware image in the controller memory device.

Technologies for lifecycle management include multiple computing devices in communication with a lifecycle management server. On boot-up, a computing device loads a lightweight firmware boot environment. The lightweight firmware boot environment connects to the lifecycle management server and downloads one or more firmware images for controllers of the computing device. The controllers includes baseboard management controllers, network interface controllers, solid-state drive controllers, or other controllers. The lifecycle management server selects firmware images and/or versions of firmware images based on the controllers or the computing device. The computing device installs each firmware image to a controller memory device coupled to a controller, and in use, each controller accesses the firmware image in the controller memory device.