A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword. The second memory is initialized to 0. The processor generates the LDPC codeword by performing accumulation with respect to the second memory using information bits. The accumulation is performed at parity bit addresses that are updated using a sequence corresponding to a parity check matrix (PCM).

A quarter product code codeword includes various R code symbols and C code symbols each including a plurality of symbols. Each symbol is loaded into a diagonal anti-diagonal structure in two unique locations. To provide for fast loading, the symbols may be shifted by one or more shift registers associated with the diagonal or anti-diagonal structure. The two locations at which each symbol is positioned are included within different diagonals or anti-diagonals making it possible to load or unload either symbol or multiple symbols in a single clock cycle. Further, by partitioning the diagonal anti-diagonal structure, multiple respective symbols or plurality of symbols may be loaded or unloaded in a single clock cycle.

A computer-based real-time streaming system under packet erasures wherein created messages can be decoded within a fixed delay form their creation is presented. Various code construction methods and corresponding hardware implementation for different cases of erasure link models are also presented.

Forward Error Correction technique: parity vectors are computed such that each parity vector spans multiple FEC frames; in a given FEC frame, a first set of syndrome bits are due to the parity vectors, and a second set of syndrome bits satisfy FEC equations that involve bits of the given FEC frame including the first set of syndrome bits; and the parity vectors are staggered with respect to any sequence in which the FEC frames are processed. Values of decoded bits of a first frame are deduced from known bits of a first parity vector having an effective length of one frame. For parity vectors having an effective length greater than one frame, a Log Likelihood Ratio of each unknown bit associated with the first frame is updated based on known and unknown bits of each parity vector. First frame is decoded using deduced bit values and updated LLR values.

A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword. The second memory is initialized to 0. The processor generates the LDPC codeword by performing accumulation with respect to the second memory using information bits. The accumulation is performed at parity bit addresses that are updated using a sequence corresponding to a parity check matrix (PCM).

In a Forward Error Correction (FEC) technique, parity vectors are computed such that: each parity vector spans a set of frames; a subset of bits of each frame is associated with parity bits in each parity vector; and a location of parity bits associated with one frame in one parity vector is different from that of parity bits associated with the frame in another parity vector. Values of decoded bits of a first frame are deduced from known parity bits of a first parity vector having an effective length of one frame. For parity vectors having, an effective length greater than one frame, a Log Likelihood Ratio of each unknown parity bit associated with the first frame is updated based on known and unknown parity bits of each parity vector. The first frame is decoded using the deduced bit values and the updated LLR values.