Techniques for improving the latency or processing performance of an error correction system are described. In an example, the error correction system implements LDPC decoding and uses an early termination rule to determine whether the LDPC decoding should be terminated prior to reaching a maximum number of iterations. The early termination rule involves various parameters that relate to the syndrome of the decoded LDPC codeword at each iteration. These parameters include the number of the current decoding iteration and the weight of the syndrome at the current iteration. For example, the early termination rule specifies that the LDPC decoding should be terminated prior to the maximum number of iterations either when the weight of the syndrome is zero, or when the current number of iterations reaches an iteration number threshold and the weight of the syndrome equals or exceeds a checksum threshold.

Systems and methods are disclosed for applying multi-stage multiple input single output (MISO) circuits for fast adaptation. An apparatus may comprise a first reader and a second reader configured to simultaneously read from a single track of a data storage medium, a MISO circuit. The MISO circuit may include a first stage filter having a first number of taps and configured to filter signal samples received from the first reader and the second reader and produce first filtered samples. The MISO circuit may also include a second stage filter having a second number of taps greater than the first number, and be configured to receive the first filtered samples corresponding to the first reader and the second reader from the first filter stage, filter the first filtered samples to produce second filtered samples, and combine the second filtered samples to produce a combined sample output.

A decoder performs iterative decoding of a codeword encoded by a binary symmetry-invariant product code, such as a half product code or quarter product code. In response to the iterative decoding reaching a stopping set, the decoder determines by reference to an ambient error graph formed from the stopping set whether or not the stopping set is correctable by post-processing. If not, the decoder outputs the uncorrected codeword and signals a decoding failure. In response to determining that the stopping set is correctable by post-processing, the decoder inverts all bits of the codeword corresponding to edges of the ambient error graph, applies an additional round of iterative decoding to the codeword to obtain a corrected codeword, and outputs the corrected codeword. Post-processing in this manner substantially lowers an error floor associated with the binary symmetry-invariant product code.

Devices and methods described herein decode a sequence of coded symbols by guessing noise. In various embodiments, noise sequences are ordered, either during system initialization or on a periodic basis. Then, determining a codeword includes iteratively guessing a new noise sequence, removing its effect from received data symbols (e.g. by subtracting or using some other method of operational inversion), and checking whether the resulting data are a codeword using a codebook membership function. This process is deterministic, has bounded complexity, asymptotically achieves channel capacity as in convolutional codes, but has the decoding speed of a block code. In some embodiments, the decoder tests a bounded number of noise sequences, abandoning the search and declaring an erasure after these sequences are exhausted. Abandonment decoding nevertheless approximates maximum likelihood decoding within a tolerable bound and achieves channel capacity when the abandonment threshold is chosen appropriately.

Devices and methods described herein decode a sequence of coded symbols by guessing noise. In various embodiments, noise sequences are ordered, either during system initialization or on a periodic basis. Then, determining a codeword includes iteratively guessing a new noise sequence, removing its effect from received data symbols (e.g. by subtracting or using some other method of operational inversion), and checking whether the resulting data are a codeword using a codebook membership function. This process is deterministic, has bounded complexity, asymptotically achieves channel capacity as in convolutional codes, but has the decoding speed of a block code. In some embodiments, the decoder tests a bounded number of noise sequences, abandoning the search and declaring an erasure after these sequences are exhausted. Abandonment decoding nevertheless approximates maximum likelihood decoding within a tolerable bound and achieves channel capacity when the abandonment threshold is chosen appropriately.

An apparatus may include a first and second servo channels configured to output first and second position information to first and second writers, respectively, via a shared write path such that the first and second writers write first and second position information to first and second magnetic recording medium surfaces, respectively. In addition, the apparatus may include a controller configured to control the shared write path such that write access is changed between the first servo channel and second servo channel a plurality of times during a revolution of the first magnetic recording medium surface and second magnetic recording medium surface.

A partial concatenated coding system using an algebraic code and LDPC code is disclosed. The partial concatenated coding system includes an ECC encoder, a received codeword monitoring module and an ECC decoder. The ECC encoder has a LDPC code encoding module and an algebraic code encoding module. The ECC decoder has a LDPC code decoding module and an algebraic code decoding module. Comparing with conventional concatenating coding systems, the present invention has advantages of less spare spaces, better error-correcting performance, lower hardware complexity, better decoding throughput and fixable code length.

An apparatus is provided. The apparatus comprises a first syndrome computation circuit configured to receive a codeword having a plurality of rows and a plurality of columns and further configured to compute a first syndrome for at least a portion of a first component codeword of the codeword. The apparatus further comprises a second syndrome computation circuit configured to receive the codeword and to compute a second syndrome for at least a portion of a second component codeword of the codeword. The apparatus further comprises a bit correction circuit configured to correct one or more erroneous bits in the codeword based, at least in part, on at least one of the first and second syndrome, wherein the first and second component codewords span two or more rows and two or more columns of the codeword.

An apparatus may include a circuit configured to receive first and second samples of an underlying data from respective first and second sample periods and which correspond to respective first and second sensors, a phase control value may have first and second values during respective first and second sample periods. The phase control value may be a control value for a sample clock signal. The circuit may also determine a difference in the phase control value between the first value and the second value. The circuit may then digitally interpolate the first and second samples to produce a phase shifted first and second samples where the digital interpolation of at least one of the first and second samples mat be at least in part based on the difference in the phase control value to compensate for a phase misalignment between the first sample and the second sample.

An apparatus may include a first and second servo channels configured to output first and second position information to first and second writers, respectively, via a shared write path such that the first and second writers write first and second position information to first and second magnetic recording medium surfaces, respectively. In addition, the apparatus may include a controller configured to control the shared write path such that write access is changed between the first servo channel and second servo channel a plurality of times during a revolution of the first magnetic recording medium surface and second magnetic recording medium surface.