A decoding method includes: receiving a plurality of subcarrier signals each including encoded data; acquiring a predetermined amount of data from each of the plurality of subcarrier signals; correcting errors in the plurality of subcarrier signals by performing decoding arithmetic processing on the respective predetermined amounts of data acquired from the plurality of subcarrier signals in a time-division manner; and causing the decoding arithmetic processing to be consecutively performed on each of the predetermined amounts of data a predetermined number of times.

Methods and systems for decoding raw data may include determining a sequence of a plurality of read-level voltages based on previous decoding data and executing a multi-stage decoding operation to decode raw data read from the plurality of memory cells using the determined sequence of the plurality of read-level voltages. Decoded data is returned from the multi-stage decoding operation upon completion of the multi-stage decoding operation and the previous decoding data is updated based on results of the multi-stage decoding operation.

According to one embodiment, a memory system includes a non-volatile memory, a memory interface that reads data recorded in the non-volatile memory as a received value, a converting unit that converts the received value to first likelihood information by using a first conversion table, a decoder that decodes the first likelihood information, a control unit that outputs an estimated value with respect to the received value, which is a decoding result obtained by the decoding, when decoding by the decoder has succeeded, and a generating unit that generates a second conversion table based on a decoding result obtained by the decoding, when decoding of the first likelihood information by the decoder has failed. When the generating unit generates the second conversion table, the converting unit converts the received value to the second likelihood information by using the second conversion table, and the decoder decodes the second likelihood information.

A memory system includes a nonvolatile memory and a memory controller. The nonvolatile memory has data encoded with an error correction code stored therein. The memory controller reads data from the nonvolatile memory, calculates likelihood information from the read data and an LLR table for calculating the likelihood information, determines a parameter for a decoding process of the read data based on the likelihood information, executes the decoding process based on the determined parameter, and outputs a decoding result obtained by the decoding process.

Methods and apparatus for transmitting and receiving broadcast signals are provided. The method for transmitting a broadcast signal includes encoding mobile data for forward error correction (FEC), encoding signaling data, forming data groups including the encoded mobile data and the encoded signaling data and transmitting a signal frame that includes the data groups.

Embodiments of the present disclosure relate to a method and apparatus for data processing in a communication system. For example, a method comprises pre-processing received data encoded with a polar code; performing a first decoding of the pre-processed data to obtain output bits; in response to decoding failure of the first decoding, bit-flipping a portion of information bits of the output bits to obtain a first additional frozen bit; and performing a second decoding based on the first additional frozen bit and the pre-processed data. Embodiments of the present disclosure further provide a communication device capable of implementing the above method.

The present invention is directed to communication systems and methods. In a specific embodiment, the present invention provides a receiver that includes an error correction module. A syndrome value, calculated based on received signals, may be used to enable the error correction module. The error correction module includes an error generator, a Nyquist error estimator, and a decoder. The decoder uses error estimation generated by the Nyquist error estimator to correct the decoded data. There are other embodiments as well.

An optimal detection voltage obtaining method, a reading control method and an apparatus are provided. The method includes: obtain a plurality of first difference values and a plurality of second difference values, the second difference value characterizes a difference value of two detection voltages which are adjacent in numerical value, the first difference value characterizes a difference between numbers of memory cells whose threshold voltages respectively equal to the two detection voltages used by the second difference value; dividing the first difference by the second difference to obtain a plurality of tangent approximations; selecting a first tangent approximation and a second tangent approximation from the plurality of tangent approximations, the first tangent approximation is a positive number and the second tangent approximation is a negative number; calculating an optimal detection voltage according to the first tangent approximation, the second tangent approximation, a first detection voltage and a second detection voltage.

Systems and methods for host-assisted storage device error correction are described. A host may first encode host data with a forward error correction code (ECC) and send the encoded host data to the storage device. The storage device may further encode the host data using its own ECC. The host may also provide the forward ECC parity information to be stored on the storage device in a different location than the host data. When the host data is read by the storage device, the storage device will decode with its ECC. If the storage device ECC decode is incomplete and the bit error rate is below the recoverable error threshold of the forward error correction, the partially-recovered host data will be sent to the host. The host will complete decode using the forward ECC and parity data. Forward ECC may be selectively applied to important host data.

The present disclosure includes apparatuses and methods for estimating an error rate associated with memory. A number of embodiments include sensing data stored in a memory, performing an error detection operation on the sensed data, determining a quantity of parity violations associated with the error detection operation, and estimating an error rate associated with the memory based on the determined quantity of parity violations.