H03M13/3944

Method and Decoder for Soft Input Decoding of Generalized Concatenated Codes
20190173495 · 2019-06-06 ·

The invention relates to a soft input decoding method and a decoder for generalized concatenated (GC) codes. The GC codes are constructed from inner nested block codes, such as binary Bose-Chaudhuri-Hocquenghem, BCH, codes and outer codes, such as Reed-Solomon, RS, codes. In order to enable soft input decoding for the inner block codes, a sequential stack decoding algorithm is used. Ordinary stack decoding of binary block codes requires the complete trellis of the code. In one aspect, the present invention applies instead a representation of the block codes based on the trellises of supercodes in order to reduce the memory requirements for the representation of the inner codes. This enables an efficient hardware implementation. In another aspect, the present invention provides a soft input decoding method and device employing a sequential stack decoding algorithm in combination with list-of-two decoding which is particularly well suited for applications that require very low residual error rates.

Method and decoder for soft input decoding of generalized concatenated codes

A soft input decoding method and a decoder for generalized concatenated (GC) codes. The GC codes are constructed from inner nested block codes, such as binary Bose-Chaudhuri-Hocquenghem, BCH, codes and outer codes, such as Reed-Solomon, RS, codes. In order to enable soft input decoding for the inner block codes, a sequential stack decoding algorithm is used. Ordinary stack decoding of binary block codes requires the complete trellis of the code. In one aspect, the present invention applies instead a representation of the block codes based on the trellizes of supercodes in order to reduce the memory requirements for the representation of the inner codes. This enables an efficient hardware implementation. In another aspect, there is provided a soft input decoding method and device employing a sequential stack decoding algorithm in combination with list-of-two decoding which is particularly well suited for applications that require very low residual error rates.

BIT-ALIGNMENT TESTING FOR OBTAINING FEC CODE LOCK
20180375534 · 2018-12-27 · ·

Methods and apparatus disclosed herein may be used to establish framing more efficiently in communication protocols with block-coded forward error correction. Such protocols generally involve the check of different bit-alignments searching for positions that yield zero syndromes. The search can be undesirably slow, particularly in the presence of received errors. The presently-disclosed bit-alignment testing technique reduces this search time by checking the syndrome at each data word as if that data word was the last of a code. In other words, the word positions are effectively checked without a prior assumption as to which words are the first and last of the code. This reduces the task to the number of different bit-alignments possible within a single data word, rather than the number of bit-alignments possible in a complete FEC code. In one implementation, the lock time is reduced by approximately 50 times when compared to a straightforward solution.

SEQUENCE-BASED POLAR CODE DESCRIPTION
20180351695 · 2018-12-06 ·

Methods, systems, and devices that support an efficient sequence-based polar code description are described. In some cases, a wireless device (e.g., a user equipment (UE) or a base station) may transmit a codeword including a set of information bits encoded using a polar code or receive a codeword including a set of information bits encoded using a polar code. As described herein, the wireless device may determine the bit locations of the information bits in the polar code based on a partition assignment vector. Specifically, the wireless device may partition bit-channels for one or more stages of polarization and assign information bits to partitions based on the partition assignment vector. Once the bit locations of the information bits are determined, the wireless device may decode a received codeword or transmit an encoded codeword based on the determined bit locations of the information bits.

Hybrid soft decoding algorithm for multiple-dimension TPC codes
10090862 · 2018-10-02 · ·

An apparatus for decoding a TPC codeword is disclosed. The apparatus includes a memory and a processor coupled to the memory. The processor is configured to receive a first set of soft information corresponding to the TPC codeword. The TPC codeword includes at least one codeword corresponding to each of first, second, and third dimensions. The processor is further configured to iteratively perform a first soft decoding procedure on the at least one codeword corresponding to the first dimension to generate a first candidate codeword and upon determining that the first candidate codeword is not a correct codeword, and perform a second decoding procedure on the at least one codeword corresponding to the third dimension to generate a second candidate codeword. The second decoding procedure generates a second set of soft information to be used at a later iteration of the first decoding procedure.

Parallelizable reduced state sequence estimation via BCJR algorithm

An apparatus and method for optimizing the performance of satellite communication system receivers by using the Soft-Input Soft-Output (SISO) BCJR (Bahl, Cocke, Jelinek and Raviv) algorithm to detect a transmitted information sequence is disclosed. A Sliding Window technique is used with a plurality of reduced state sequence estimation (RSSE) equalizers to execute the BCJR algorithm in parallel. A serial data stream is converted into a plurality of data blocks using a serial-to-parallel converter. After processing in parallel by the equalizers, the output blocks are converted back to a serial data stream by a parallel-to-serial converter. A path history is determined using maximum likelihood (ML) path history calculation.

Quantum code with pairwise checks

A quantum error correcting code with dynamically generated logical qubits is provided. When viewed as a subsystem code, the code has no logical qubits. Nevertheless, the measurement patterns generate logical qubits, allowing the code to act as a fault-tolerant quantum memory. Each measurement can be a two-qubit Pauli measurement.

Decoding apparatus, decoding method and program

A decoding device includes a memory and a processor configured to execute inputting a code word encoded by a polar code from an original message; decoding the original message from the code word based on a conditional probability expressed by a symmetric parameterization and having observation information as a condition; and outputting the decoded original message.

System and method for decoding data

A method for decoding data comprises receiving a sequence of symbols from a data sender over a noisy data channel. At a first decoder, a first search for a candidate error pattern is performed, within a search region, among a plurality of candidate error patterns, and an indication of a failure of the first search is output to a second decoder when no candidate error pattern is found within the search region. At the second decoder, a second search is performed, in parallel with the first search, for the candidate error pattern by evaluating the candidate error patterns for codebook membership based on the sequence of symbols, one or more of the candidate error patterns being skipped from the second search based on the indication of the failure of the first search. The sequence of symbols is decoded based on an outcome of the first search and the second search.