H03M13/3994

ENCODER DEVICE, DECODER DEVICE, AND METHODS THEREOF
20180212630 · 2018-07-26 ·

An embodiment encoder device for encoding an information word c=[c.sub.0, c.sub.1, . . . , c.sub.K1] having K information bits, c.sub.i, includes an encoder for a tail biting convolutional code having a constraint length, L, where K<L1; the encoder being configured to receive the K information bits; and encode the K information bits so as to provide an encoded code word. An embodiment decoder device for determining an information word c=[c.sub.0, c.sub.1, . . . , c.sub.K1], having K information bits, c.sub.i, includes a decoder for a tail biting convolutional code having a constraint length, L, where K<L1; the decoder being configured to: receive an input sequence; compute at least one reliability parameter based on the received input sequence; and determine an information word c based on the at least one reliability parameter.

DECODING DEVICE AND METHOD USING CONTEXT REDUNDANCY
20180018243 · 2018-01-18 ·

The disclosure relates to a decoding device, comprising: a receiver configured to provide a sequence of information bits comprising context redundancy information, wherein the sequence of information bits is encoded based on a predefined channel code; a trellis generation logic configured to generate a plurality of trellis states based on the sequence of information bits and the channel code; a trellis reduction logic configured to reduce the plurality of trellis states by at least one trellis state based on the context redundancy information; and a decoder configured to decode the sequence of information bits by using a metric based on the reduced number of trellis states.

CONTEXT-BASED DECODER CORRECTION
20240419895 · 2024-12-19 ·

Disclosed in some examples are methods, systems, and machine-readable mediums for utilizing context information to create decoding feedback information to improve decoder accuracy and/or performance. In some examples, the context information is from layers of a network stack above the layers in which the decoders are present. The context information may be or be based upon information about previously received and decoded data and/or information about the sender to provide decoding feedback information to the decoder that is used either to correct a previous decoding error or to inform the decoder on which of a plurality of decoding choices is more likely to be correct. This may increase decoding performance by decreasing errors and in some examples, reducing the complexity of choices by eliminating certain decoding possibilities and thus increasing decoder efficiency.

VOICE CONTEXT-BASED DECODER CORRECTION
20240420707 · 2024-12-19 ·

Disclosed in some examples are methods, systems, and machine-readable mediums for utilizing context information to create decoding feedback information to improve decoder accuracy and/or performance. In some examples, the context information is from layers of a network stack above the layers in which the decoders are present. The context information may be or be based upon information about previously received and decoded data and/or information about the sender to provide decoding feedback information to the decoder that is used either to correct a previous decoding error or to inform the decoder on which of a plurality of decoding choices is more likely to be correct. This may increase decoding performance by decreasing errors and in some examples, reducing the complexity of choices by eliminating certain decoding possibilities and thus increasing decoder efficiency.

COMPUTER SYSTEM AND METHOD FOR ARITHMETIC DECODING
20250202508 · 2025-06-19 · ·

A computer system for performing arithmetic decoding includes one or more memories configured to store an array of coefficients and an interval of values. The computer system includes a circuit configured to perform comparisons of the coefficients of the array of coefficients and the interval of values and count the results of the comparisons that are identical and successive. The computer system also includes a digital signal processor configured to determine a value of a symbol associated with the array of coefficients based on the count of identical and successive results.

Cyclic redundancy check for staircase decoding procedures

Methods, systems, and devices for wireless communications are described. A receiving device may receive an encoded signal including a set of information blocks. Each information block may include a set of encoded information bits and a set of cyclic redundancy check (CRC) bits. The receiving device may perform a staircase decoding procedure to decode the set of encoded information bits of a selected information block that is part of a subset of the set of information blocks that is within a sliding window. The staircase decoding procedure may include one or more iterations of a decoding process applied to the subset of the set of information blocks. The receiving device may perform, inbetween iterations of the staircase decoding procedure applied to the subset of the set of information blocks within the sliding window, a CRC procedure based on the set of CRC bits in the set of information blocks.