Certain aspects of the present disclosure relate to methods and apparatus for channel-war polar code construction.

This disclosure describes a programmable device, referred to generally as a data processing unit, having multiple processing units for processing streams of information, such as network packets or storage packets. This disclosure also describes techniques that include enabling data durability coding on a network. In some examples, such techniques may involve storing data in fragments across multiple fault domains in a manner that enables efficient recovery of the data using only a subset of the data. Further, this disclosure describes techniques that include applying a unified approach to implementing a variety of durability coding schemes. In some examples, such techniques may involve implementing each of a plurality of durability coding and/or erasure coding schemes using a common matrix approach, and storing, for each durability and/or erasure coding scheme, an appropriate set of matrix coefficients.

A transmitter (200) generates (602) an encoded vector (404) by encoding (406) a data vector (402), the encoded vector representing payload information and parity information. The encoding is mathematically equivalent to calculating three or more forward error correction (FEC) codewords from the data vector and then calculating the encoded vector from the codewords, at least one codeword being calculated from at least one recursion of a mathematical operation, and at least one codeword comprising more than 6 terms. The transmitter transmits (604) a signal representing the encoded vector over a communication channel. A receiver (300) determines (702) a vector estimate (502) from the signal and recovers (716) the data vector from the vector estimate by sequentially decoding (706, 710, 714) the codewords, wherein at least one codeword that is decoded earlier in the decoding enhances an estimate of at least one codeword that is decoded later in the decoding.

An information processing device coupled to a first switch among a plurality of switches and included in a plurality of information processing devices includes: a memory; and a processor coupled to the memory and configured to: store, in the memory, communication destination information based on a plurality of bit strings related to communication destinations of collective communication; and communicate with an information processing device connected to a second switch among the plurality of switches on a basis of the communication destination information. Some information processing devices that include the information processing device among the plurality of information processing devices participate in the collective communication, and the plurality of bit strings is selected from a bit string set related to the communication destinations of the plurality of information processing devices on a basis of the number of the some information processing devices.

A method for performing code block segmentation for wireless transmission using concatenated forward error correction encoding includes receiving a transport block of data for transmission having a transport block size, along with one or more parameters that define a target code rate. A number N of inner code blocks needed to transmit the transport block is determined. A number M—outer code blocks may be calculated based on the number of inner code blocks and on encoding parameters for the outer code blocks. The transport block may then be segmented and encoded according to the calculated encoding parameters.

A memory module includes logic elements that are configurable to a particular ECC implementation. As used herein, the term “ECC implementation” refers to ECC functionality for performing error detection and subsequent processing, for example using the results of the error detection to perform error correction and to encode data such that any errors can be later identified and corrected. The approach allows a memory module or computing device to be configured to a specific ECC implementation without requiring requests to be sent back and forth between a host.

Provided is an encoding method and device and a decoding method and device for structured LDPC. The encoding method includes: determining a base matrix used for encoding and performing an LDPC encoding operation on a source information bit sequence according to the base matrix and an expansion factor Z corresponding to the base matrix to obtain a codeword sequence, where Z is a positive integer. The base matrix includes multiple submatrices and the submatrices include an upper-left submatrix Hb1 and an upper-left submatrix Hb2, and the upper-left submatrix Hb1 is an upper-left submatrix of the upper-left submatrix Hb2.

An apparatus and method for efficiently decoding a low-density parity-check (LDPC) code in a communication or broadcasting system are provided. The disclosure relates to performing decoding of an LDPC code by using layered scheduling or a method equivalent thereto, and provides an LDPC decoding apparatus and method for improving decoding performance without increasing decoding complexity by applying appropriate decoding scheduling according to structural or algebraic characteristics of an LDPC code.

A transmission apparatus includes a signal processing circuit configured to obtain information data bits to be transmitted; add known information data bits to the information data bits to generate first data blocks; perform error-correction coding on the first data blocks to generate first coded data blocks including parity data blocks such that the first coded data blocks satisfy a first code rate; remove the known information data bits from the first coded data blocks to generate second coded data blocks, the second coded data blocks satisfying a second code rate different from the first code rate; and modulate the second coded data blocks using a modulation scheme to generate a modulated signal, which is then transmitted. A number of the known information data bits depends on a number of the information data bits such that the first code rate is fixed regardless of the number of the information data bits.

A pre-5th-generation (pre-5G) or 5G communication system for supporting higher data rates beyond a 4th-generation (4G) communication system, such as long term evolution (LTE) is provided. A channel encoding method in a communication or broadcasting system includes identifying an input bit size, determining a block size (Z), determining a low density parity check (LDPC) sequence to perform LDPC encoding, and performing the LDPC encoding based on the LDPC sequence and the block size.