A bit interleaving method involves applying a bit permutation process to bits of a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N′/M folding sections (N′ being a subset of N selected cyclic blocks and being a multiple of M/F), each of the constellation words being associated with one of the F×N′/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.

A transmitter apparatus and a receiver apparatus are provided. The transmitter apparatus includes: an encoder configured to generate a low density parity check (LDPC) by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol. The modulator maps a bit included in a predetermined group from among a plurality of groups constituting the LDPC codeword onto a predetermined bit in the modulation symbol.

Apparatuses for transmitting and receiving a signal in a communication system are provided. An apparatus of a receive device includes a receiver configured to receive, from a transmit device, a signal comprising remaining bits of parity bits after puncturing, wherein the parity bits are obtained by adding at least one shortened bit to information bits to obtain input bits for an encoding, if a number of the information bits is less than a number of the input bits for the encoding; and a hardware processor configured to determine a number of puncture bits for the parity bits, generate an output signal by adding at least one value corresponding to the number of the puncture bits to the signal, and decode the output signal.

A bit interleaving method involves applying a bit permutation process to a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N/M folding sections, each of the constellation words being associated with one of the F×N/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

The present technology relates to a data processing apparatus and a data processing method that are able to provide an LDPC code with a good error rate. An LDPC encoder performs coding by an LDPC code having a code length of 16200 bits and a code rate of 12/15. The LDPC code includes an information bit and a parity bit, and a parity check matrix H is configured with an information matrix portion corresponding to the information bit of the LDPC code and a parity matrix portion corresponding to the parity bit. An information matrix portion of the parity check matrix H is represented by a parity check matrix initial value table representing a position of an element of 1 in the information matrix portion at an interval of 360 columns. The present technology may be applied to a case of performing an LDPC coding and an LDPC decoding.

The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 12/15, 6/15, or 8/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.

A transmitter apparatus and a receiver apparatus are provided. The transmitter apparatus includes: an encoder configured to generate a low density parity check (LDPC) by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol. The modulator maps a bit included in a predetermined group from among a plurality of groups constituting the LDPC codeword onto a predetermined bit in the modulation symbol.

A control device for use in a broadcast system includes a broadcast controller that controls a broadcast transmitter of the broadcast system that broadcasts broadcast signals in a coverage area for reception by terminals including a broadcast receiver and a broadband receiver, and a broadband controller that controls a broadband server of a broadband system that provides redundancy data to terminals within the coverage area. The broadband controller is configured to control the provision of redundancy data by the broadband server for use by one or more terminals which use the redundancy data together with broadcast signals received via said broadcast system for recovering content received within the broadcast signals and/or provided via the broadband system.