A digital-to-analog conversion system is provided. The digital-to-analog conversion system includes a digital-to-analog converter configured to receive a pre-distorted digital signal from a digital circuit, and to generate an analog signal based on the pre-distorted digital signal. Further, the digital-to-analog conversion system includes a feedback loop for providing a digital feedback signal to the digital circuit. The feedback loop includes an analog-to-digital converter configured to generate the digital feedback signal based on the analog signal, and wherein a sample rate of the analog-to-digital converter is lower than a sample rate of the digital-to-analog converter.

A method for digital resampling in a digital communications receiver is described. The method comprises selecting whole samples of a received input signal in the time domain and implementing sub-sample digital interpolation in the frequency domain. This amounts to performing the time shift of the interpolation process in the frequency domain. The method may be performed in conjunction with the operation of a polarisation recovery filter. A digital communications receiver is also provided the receiver being arranged to perform frequency domain sub-sample interpolation on an input data signal.

Described herein are systems configured for inter-band carrier aggregation. Systems include a multiplexing circuit having a switching network and diplexers wherein the switching network is configured to share inductors between multiple paths of the multiplexing circuit. The filters can be designed so that when operated simultaneously (e.g., during multi-band operation) the same inductance can be used allowing the switching network to switch in a particular inductance into the path. The described systems can include an inductance that is coupled to an output port so that when operating in single-band mode, the different paths share the same inductance. Relative to other solutions, the described systems can improve performance (e.g., reduce insertion loss), reduce the number of components in the associated module, reduce manufacturing costs, and the like.

Described herein is an improved apparatus for increasing the performance of a modulator, which may function as an ADC. In one embodiment, the modulator comprises a voltage to current converter, a capacitor connected between two outputs of the voltage to current converter to receive a differential input current, and a switch that can switch between connecting each output of the voltage to current converter to ground while disconnecting the other output of the voltage to current converter. In this embodiment, the modulator has no common mode control loop, and no reference current. This results in decreased complexity, i.e., fewer components, as well as reduced noise.

This specification discloses methods and systems for implementing a chip integrated scope (i.e., chip scope (CS)), which is a feature that allows a user to scope RF signals (internally and externally to the DUT (device under test)), by using the RF receive path (including amplifier, filter, ADC, DSP) to capture and store signal traces. In some embodiments, this specification discloses methods and systems to enhance the resolution and accuracy of these signal traces by using raw and correction data for gain/phase compensation of gain/phase impairments introduced in the Rx (receiver) path. In some embodiments, the correction data is generated from one or more of the following: simulation data, characterization data, production test data

Certain aspects of the present disclosure are directed to a digital predistortion (DPD) device for use within a wireless transmitter that permits the use of a downstream digital-to-analog converter that operates at a clock rate close to the bandwidth of a digital baseband input signal. In some examples, a sampling rate of a digital baseband input signal is increased using an upsampler to obtain an increased rate digital input signal. Predistortion is applied to the increased rate digital input signal using a DPD device to obtain a predistorted digital signal. The sampling rate of the predistorted digital signal is then decreased using a downsampler to obtain a lower-rate predistorted digital signal with a sampling rate below the increased rate of the upsampler (e.g. close to the bandwidth of a digital baseband input signal). A low pass filter may be provided to filter out-of-band signal components from the predistorted digital signal.

A method of operating a communications system includes receiving a signal at a digital predistorter (DPD), introducing predistortion to the signal using the DPD, and converting the predistorted signal to an analog signal using a digital-to-analog converter having a first bandwidth. The method also includes amplifying the analog signal, sampling the amplified signal using an analog-to-digital converter having a second bandwidth less than the first bandwidth, and extracting coefficients of the DPD from the sampled signal..

Described herein is an improved apparatus for increasing the performance of a modulator, which may function as an ADC. In one embodiment, the modulator comprises a voltage to current converter, a capacitor connected between two outputs of the voltage to current converter to receive a differential input current, and a switch that can switch between connecting each output of the voltage to current converter to ground while disconnecting the other output of the voltage to current converter. In this embodiment, the modulator has no common mode control loop, and no reference current. This results in decreased complexity, i.e., fewer components, as well as reduced noise.

A system for converting a digital input signal into an analog output signal is provided, the system has at least three different signal paths with different but overlapping frequency ranges, at least three digital-to-analog converters, at least three analog filters, and a combiner unit. Each of the digital-to-analog converters is connected to at least one signal path, wherein the signals transmitted to the digital-to-analog converters are phase coherent. Each of the digital-to-analog converters is connected to a combiner unit, and each of the analog filters is associated with one of the digital-to-analog converters, wherein at least one of the digital-to-analog converters has a lower sampling rate than the sampling rate of at least two others of the digital-to-analog converters. Further, a method for converting a digital input signal into an analog output signal is shown.

Embodiments in accordance with the present disclosure are directed to communications apparatuses and methods thereof that includes a radio frequency (RF) front-end circuitry and RF back-end circuitry. The RF front-end circuit receives sets of RF signals concurrently and as transmitted from at least two disparate communication networks. The front-end circuitry includes a tunable radio having at least one antenna feeding signal conditioning and down conversion circuitry, and decimation circuitry. The decimation circuitry filters and decimates data associated with the RF signals into a plurality of digital data streams. The RF back-end circuitry includes a plurality of digital-signal processors (DSPs) that extract raw data packets from the digital data streams and a microprocessor. The microprocessor transmits the plurality of digital data streams to the plurality of DSPs and transmits the extracted raw data packets, received from the plurality of DSPs, to an end-user device.