An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and merging at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.

An in-band full-duplex transceiver includes a self-interference mixer for up-converting an adjusted digital baseband signal into an up-converted self-interference cancellation signal. The adjusted digital baseband signal has a phase opposite to a phase for a leakage signal from a leakage path for the transceiver. Similarly, the adjusted digital baseband signal has a magnitude matching a magnitude for the leakage signal. Given this phasing and magnitude for the up-converted self-interference signal, it substantially cancels the leakage signal when added with a received signal contaminated by the leakage signal.

A communication system including an analog front end and an automatic gain controller. The analog front end includes at least one amplifier for amplifying a received analog signal and an analog to digital converter that converts the analog signal to digital samples. The automatic gain controller includes comparator circuitry, counter circuitry, and a gain controller. The comparator circuitry compares each of the digital samples with an upper threshold and a lower threshold. The counter circuitry counts a high count number of the digital samples having magnitudes that are greater than the upper threshold during each count window and counts a low count number of the digital samples having magnitudes that are less than the lower threshold during the count window. The gain controller adjusts a gain of the at least one amplifier by an amount based on the high count number and the low count number.

The disclosure relates to technology for an apparatus having a current conveyer comprising a first stage having a first differential input, and a second stage having a second differential input. The first and second stages are configured to operate in a push-pull mode to provide an output signal at a current conveyer output between the first stage and the second stage. The apparatus has a first frequency mixer configured to generate a first mixer signal based on an input signal and an oscillator signal having a first frequency. The first frequency mixer is configured to provide the first mixer signal to the first differential input. The apparatus has a second frequency mixer configured to generate a second mixer signal based on the input signal and a second oscillator signal having the first frequency. The second frequency mixer is configured to provide the second mixer signal to the second differential input.

Certain aspects of the present disclosure generally relate to a programmable multi-mode digital-to-analog converter (DAC) for generating a frequency-modulated signal. For example, certain aspects provide a circuit for sweeping a frequency of an output signal. The circuit generally includes a DAC having an input coupled to an input path of the circuit and an output coupled to an output path of the circuit, a first mixer selectively incorporated in the input path coupled to the input of the DAC, and a second mixer selectively incorporated in the output path coupled to the output of the DAC.

A communication system provides reliable wideband communications with reduced power consumption in a user equipment (UE) receiver. A UE may include receiver circuitry to receive a radio frequency (RF) signal from a wireless network and output an analog baseband signal. The RF signal includes M copies of a duplicated signal in a frequency domain. The analog baseband signal includes the M copies of the duplicated signal uniformly offset from one another in the frequency domain by a bandwidth F and including a gap between adjacent copies. The UE further includes an anti-aliasing analog filter an analog to digital converter (ADC). The ADC samples an output of the anti-aliasing analog filter at a sampling frequency selected to obtain a digital baseband signal comprising a combined digital copy of the M copies of the duplicated signal folded over each other.

An IQ estimation module comprising a powerup state IQ estimator configured to generate powerup state IQ estimates based on a powerup calibration of the IQ estimation module, a steady state IQ estimator configured to generate steady state IQ estimates during a steady state operation of the IQ estimation module, and an IQ estimate extender configured to determine differences between the powerup state IQ estimates and steady state IQ estimates at their respective frequency bins and adjust the powerup state IQ estimates to improve the accuracy of IQ estimates.

A MIMO transceiver has a plurality of analog processing subsystems that each includes at least one antenna, a duplexer, at least one power amplifier, at least one mixer, an interface connectable to a baseband processing subsystem, and the MIMO transceiver has one or more analog radio frequency processing chips. Each analog processing subsystem of the plurality of analog processing subsystems is on a single one of the analog radio frequency processing chips, and each analog radio frequency processing chip comprises a metallization on at least one side of the chip and wherein the metallization comprises integration of the at least one antenna.

Embodiments in accordance with the present disclosure are directed to communications apparatuses and methods thereof that includes a radio frequency (RF) front-end circuitry and RF back-end circuitry. The RF front-end circuit receives sets of RF signals concurrently and as transmitted from at least two disparate communication networks. The front-end circuitry includes a tunable radio having at least one antenna feeding signal conditioning and down conversion circuitry, and decimation circuitry. The decimation circuitry filters and decimates data associated with the RF signals into a plurality of digital data streams. The RF back-end circuitry includes a plurality of digital-signal processors (DSPs) that extract raw data packets from the digital data streams and a microprocessor. The microprocessor transmits the plurality of digital data streams to the plurality of DSPs and transmits the extracted raw data packets, received from the plurality of DSPs, to an end-user device.

Certain aspects of the present disclosure generally relate to a programmable multi-mode digital-to-analog converter (DAC) for generating a frequency-modulated signal. For example, certain aspects provide a circuit for sweeping a frequency of an output signal. The circuit generally includes a DAC having an input coupled to an input path of the circuit and an output coupled to an output path of the circuit, a first mixer selectively incorporated in the input path coupled to the input of the DAC, and a second mixer selectively incorporated in the output path coupled to the output of the DAC.