One embodiment of the disclosure relates to supporting distinct single-input single-output (SISO) services in a multiple-input multiple-output (MIMO) baseband circuit, particularly suited for a distributed antenna system (DAS). In this regard, in one aspect, two communication paths in the MIMO baseband circuit are reconfigured to distribute two distinct SISO signals. A quadrature modulator modulates the two distinct SISO signals to two different radio frequency (RF) bands, respectively, based on a modulation frequency. In another aspect, the two or more distinct SISO signals are provided to the quadrature modulator using two intermediate frequencies (IFs) that are determined based on the center frequencies and bandwidths of the two different RF bands. By reconfiguring the MIMO baseband circuit to distribute the two distinct SISO signals, it is possible to retro-support new wireless communication services and/or new RF bands in existing DAS installations without replacing the MIMO baseband circuit.

The system and method of the present invention provide power efficient, high fidelity non-PWM communications of audio signals for reception by a modulating AM receiver at various useful frequency bands, or loud speaker transmission using sound waves.

A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.

Disclosed herein is an apparatus and methodology for reducing peak-to-average-power ratio (PAPR) for IQ radio frequency digital-to-analog converter (RFDAC). Processing circuitry may be configured to generate a digital signal comprising an in-phase (I) signal component and a quadrature (Q) signal component having a peak-to-average-power-ratio (PAPR). The processing circuitry may determine the I signal component and the Q signal component are higher than a predetermined threshold value, and limit the I signal component and the Q signal component to be less than or equal to the predetermined threshold value. The processing circuitry may rotate the signal components to generate rotated signal components to reduce the PAPR based on the I and Q signal components having less than or equal to the predetermined threshold value, and may generate an output radio frequency (RF) signal based on the rotated signal components.

Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

A method and apparatus for dynamically modifying filter characteristics of a Delta-Sigma modulator to accommodate for Doppler shift. A transceiver in a wireless cellular communication system for adapt to changes in the RF carrier frequency for maintaining signal integrity by applying a pilot tone in calibration to determine a frequency shift response for a bandpass filter. During operation, the system is operative to determine a Doppler shift and to shift the bandpass filter in response.

A method and apparatus for dynamically modifying filter characteristics of a Delta-Sigma modulator to accommodate for Doppler shift. A transceiver in a wireless cellular communication system for adapt to changes in the RF carrier frequency for maintaining signal integrity by applying a pilot tone in calibration to determine a frequency shift response for a bandpass filter. During operation, the system is operative to determine a Doppler shift and to shift the bandpass filter in response.

Disclosed herein is an apparatus and methodology for reducing peak-to-average-power ratio (PAPR) for IQ radio frequency digital-to-analog converter (RFDAC). Processing circuitry may be configured to generate a digital signal comprising an in-phase (I) signal component and a quadrature (Q) signal component having a peak-to-average-power-ratio (PAPR). The processing circuitry may determine the I signal component and the Q signal component are higher than a predetermined threshold value, and limit the I signal component and the Q signal component to be less than or equal to the predetermined threshold value. The processing circuitry may rotate the signal components to generate rotated signal components to reduce the PAPR based on the I and Q signal components having less than or equal to the predetermined threshold value, and may generate an output radio frequency (RF) signal based on the rotated signal components.

A digital measurement input for an electric automation device has a receiving device configured to receive digital input measurement values generated by sampling an analog measurement signal at a first sampling rate, and a signal converting device configured to generate digital output measurement values from the digital input measurement values and to provide digital output measurement values. The sampling rate and sampling times of each digital output measurement value is adapted to a specified sampling rate and/or specified sampling time. The signal converting device has a digital encoder filter on the input side and a digital decoder filter on the output side, between which an interpolator is provided. The encoder filter, the interpolator, and the decoder filter are matched to one another so as to adapt the sampling rate and/or sampling time of the digital input measurement values.