A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.

Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

A demodulator 100 includes: an AD conversion section 10 that converts a received signal RF in an analogue form to a digital signal; a noise removal section 40 that is connected to a back side of the AD conversion section 10 to detect and remove a noise from an input signal; decimation filters 52 and 54 that are connected to a back side of the noise removal section 40 and reduce a data rate of an input signal; and a demodulation section 60 that is connected to back sides of the decimation filters 52 and 54 and demodulates an input signal. The decimation filters 52 and 54 are connected to the back side of the noise removal section 40, which provides a demodulator less subject to degradation of a signal wave.

A method of connecting heterogeneous devices to a network is provided. The method includes providing base stations connected to a network, and at each of the base stations, receiving probe signals from terminal devices working on different frequency bands. For each of the terminal devices, the base station calculates a signature waveform based on a time-reversed waveform of a channel response signal derived from the corresponding probe signal. For each of the terminal devices, the base station determines a downlink transmit signal for the terminal device based on the downlink data and the corresponding signature waveform, and transmits the downlink signals to the heterogeneous terminal devices using a single radio-frequency front-end. Besides supporting heterogeneous terminal devices simultaneously, the heterogeneous time-reversal system has features such as asymmetric complexity architecture, which is better for the low-complexity and energy-efficiency requirements of terminal devices in the Internet of Things.

An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuity is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

A heterodyne receiver structure comprises a frequency conversion block arranged to convert an incoming analog radio frequency (RF) signal to an analog intermediate frequency (IF) signal; a filter block arranged to filter said analog IF signal; and an analog-to-digital (AD) converter block arranged to convert said filtered analog IF signal to a digital signal, wherein the AD converter block (309) is arranged to convert the filtered analog IF signal to the digital signal by using a sampling frequency (fs) which is at least N times a maximum bandwidth of the filtered analog IF signal, wherein the frequency spectrum from zero to the sampling frequency is divided into N frequency zones of equal width, wherein N is an even positive number higher than two; the frequency conversion block (304) is arranged to convert the incoming analog RF signal to the analog IF signal such that the analog IF signal is located in any of the N/2-1 frequency zones having lowest frequency; and the filter block (306-308) is arranged to low pass the analog IF signal such that any disturbing signal located in a zone, which would have a mirror image after the AD conversion in the zone, in which the analog IF signal is located, is filtered away, wherein the heterodyne receiver structure further comprises a digital signal processing block (311) arranged to filter said digital signal.