A receiving module of a transmission interface includes an analog front-end (AFE) circuit and a track-and-hold circuit. The AFE circuit receives an input signal to generate a first intermediate signal. The track-and-hold circuit samples the first intermediate signal according to a first clock to generate a second intermediate signal, and comprises at least one first switch, at least one second switch, at least one first capacitor, and at least one second capacitor. The first and second switches are turned on or off according to the first clock. The first capacitor has first and second terminals. The first terminal is coupled to the AFE circuit. The second terminal receives a second clock. The second capacitor has third and fourth terminals. The third terminal is coupled to the AFE circuit. The fourth terminal receives the second clock. The first clock and the second clock are inverted signals of each other.

Techniques for described for combining fragmented carriers. An example method can include processing, using a first local oscillator (LO), a first analog signal and a second analog signal that are separated by a frequency offset, an output of the first LO used to generate a first digital signal and a second digital signal. The method can further include downshifting the first digital signal based on the center frequency to generate a downshifted digital signal. The method can further include upshifting the second digital signal based on the center frequency to generate an upshifted digital signal. The method can further include combining the downshifted signal and the upshifted signal to generate a combined digital signal, wherein the downshifted digital signal is orthogonal to the upshifted digital signal, and wherein a second total bandwidth of the combined digital signal is less than the threshold bandwidth.

Passive intermodulation (PIM) correction circuitry mitigates the effects of PIM within receiver circuitry. The PIM correction circuitry includes modeling circuitry, adapt circuitry, and compensation circuitry. The modeling circuitry receives one or more transmitter data signals. Further, the modeling circuitry generates output signals based on the one or more transmitter data signals, and a correction signal based on the output signals and correction coefficients. The correction signal is combined with an input signal to generate a corrected output signal. The adapt circuitry receives a first output signal of the output signals and the corrected output signal. The adapt circuitry correlates the first output signal with the corrected output signal to generate update values. The compensation circuitry receives the update values and generates updated correction coefficients based on the update values.

A radio frequency (RF) amplifier assembly includes modular amplification and processing units, which can be easily installed or replaced in the housing of the RF amplifier assembly, e.g., in response to changing needs and/or changing capabilities in the cable network communications system. The RF amplifier housing facilitates, e.g., via slots with connectors, accepting and coupling of alternative modular units, which can be installed/removed. The RF amplifier assembly includes a first spectrum (e.g., legacy spectrum) amplification and processing circuit, supporting both upstream and downstream signaling. The RF amplification assembly further includes one or more optional additional (extended) spectrum amplification and processing circuits, which are removeable modular units, and which support downstream signaling over extended spectrum. The RF amplifier assembly further includes spectrum splitter/combiner circuits, e.g., implemented in some embodiments using a diplexer-less design, for splitting/combining spectrum blocks with regard to multiple amplification and processing circuits installed within the RF amplifier assembly.