H04B1/0082

DIGITAL-TO-TIME CONVERTER (DTC) NON-LINEARITY PREDISTORTION

A method for compensating signal nonlinearities includes generating a local oscillator (LO) signal and performing phase modulation of the LO signal to generate a phase-modulated LO signal. The phase modulation is based on applying at least one digital-to-time converter (DTC) code of a plurality of DTC codes to a rising edge signal portion and a falling edge signal portion associated with the LO signal. Nonlinearities associated with the rising edge signal portion and the falling edge signal portion are determined. The at least one DTC code is adjusted based on the nonlinearities.

NEAR ZERO INTERMEDIATE FREQUENCY (NZIF) COMPENSATION OF LOCAL OSCILLATOR LEAKAGE

In an embodiment, a communications system includes a first transmitter including a digital beamforming baseband section configured to receive an input signal to be transmitted, the input signal at a baseband frequency, and a modulation section electrically coupled to the digital beamforming baseband section and a first antenna of a phased array antenna. The modulation section is configured to receive a local oscillator signal at a first local oscillator frequency and apply a baseband frequency shift to the input signal to generate a baseband frequency shifted input signal. The modulation section generates a modulated signal based on the input signal. The communication system includes a second transmitter included in a second IC chip of the plurality of IC chips electrically coupled to a second antenna and configured to provide a second modulated signal at the carrier frequency and a second LO leakage signal at a second local oscillator frequency.

Frequency synthesis with reference signal generated by opportunistic phase locked loop

Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency f.sub.RF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency f.sub.XTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency f.sub.REF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

Efficient multi-band transmitter

Transmitters, sensor systems, and methods of transmission include a frequency adjuster coupled to a ring oscillator to reduce latency and power consumption and to receive a signal from the ring oscillator. The frequency adjuster includes logic circuits to adjust the signal to a selected transmission frequency band. A band switch is coupled to the ring oscillator and the frequency adjuster to select logic circuits within the frequency adjuster to determine the selected transmission frequency band from a set of output frequency bands. A first radio front end is coupled to the frequency adjuster to transmit the signal on the selected transmission frequency band.

APPARATUS AND METHODS FOR WIDEBAND RECEIVERS
20170310520 · 2017-10-26 ·

Provided herein are apparatus and methods for wideband receivers. In certain configurations, a radio frequency (RF) communication system includes two or more receiver slices that operate in parallel with one another to process an RF input signal. The receiver slices generate digital signals by processing different sub-bands of the RF input signal. For example, the RF communication system can include a first receiver slice that processes a first sub-band of the RF input signal and that generates a first digital signal representing the first sub-band, and a second receiver slice that processes a second sub-band of the RF input signal and generates a second digital signal representing the second sub-band. The RF communication system further includes a clock generation circuit that generates one or more clock signals to control timing of the receiver slices, and a sub-band processing circuit that processes the digital signals from the receiver slices.

MIMO TRANSCEIVER SUITABLE FOR A MASSIVE-MIMO SYSTEM
20170302342 · 2017-10-19 · ·

An embodiment of the disclosed MIMO transceiver uses a single master clock to generate (i) the sampling-clock signals for the analog-to-digital and digital-to-analog converters and (ii) the multiple electrical local-oscillator signals that are used in various channels of the transceiver's analog down- and up-converters to translate signals between the corresponding intermediate-frequency and RF bands. The MIMO transceiver may employ a plurality of interconnected frequency dividers configured to variously divide the master-clock frequency to generate the sampling-clock signals and the multiple local-oscillator signals in a manner that causes these signals to have different respective frequencies. In embodiments designed for operating in the mmW band, the MIMO transceiver may also employ a frequency multiplier configured to multiply the master-clock frequency to generate an additional local-oscillator signal for translating signals between the mmW and RF bands.

Demodulating surveillance signals

In some examples, a system includes at least two antennas configured to receive signals encoding first, second, and third messages in first, second, and third frequency bands. The system also includes a set of splitters configured to generate separate signals in the first, second, and third frequency bands. The system further includes a set of combiners, wherein each combiner of the set of combiners is configured to combine two or more of the separate signals. The system includes a set of mixers configured to down-convert the combined signals and at least one analog-to-digital converter configured to sample the down-converted signals. The system also includes processing circuitry configured to determine data in the first, second, and third messages based on an output of the at least one analog-to-digital converter.

Near zero intermediate frequency (NZIF) compensation of local oscillator leakage

In an embodiment, a communications system includes a transmitter including a digital beamforming baseband section including a digital mixer, the digital beamforming section configured to receive an input signal to be transmitted, the input signal at a baseband frequency; and a modulation section electrically coupled to the digital beamforming baseband section, the modulation section including an up converter configured to receive a local oscillator signal at a local oscillator frequency. The digital mixer is configured to apply a baseband frequency shift to the input signal to generate a baseband frequency shifted input signal at a different frequency from the baseband frequency. The up converter is configured to up convert the baseband frequency shifted input signal based on the local oscillator signal to generate a modulated signal at a carrier frequency, wherein the local oscillator frequency is different from the carrier frequency.

Digital-to-time converter spur reduction

This application discusses, among other things, apparatus and methods for improving spurious frequency performance of digital-to-time converters (DTCs). In an example, a method can include receiving a code at selection logic of a digital-to-time converter at a first instant, selecting a first delay path of the DTC to provide a delay associated with the code, associating a second delay path with the code, receiving the code at the selection logic at a second instant, and selecting the second delay path of the DTC to provide the delay associated with the code.

RECEIVER WITH TUNABLE RECEIVING CHAIN

A receiver includes a tunable receiving chain, configured to receive a subframe header when tuned to a first receiving bandwidth; a decoder, configured to decode an allocation information from the subframe header, the allocation information indicating an allocation of a plurality of resource blocks in the subframe; and a controller, configured to derive a second receiving bandwidth from the allocation information and to tune the receiving chain to the second receiving bandwidth.