Methods and wireless devices for selecting a local oscillator frequency to use for conducting orthogonal frequency division multiplexing (OFDM) communications. For each of a plurality of local oscillator frequencies, a wireless device determines a respective interference power resultant from the local oscillator frequency for each of a plurality of subcarriers, and determines a cost function by performing a summation over the interference powers associated with each of the plurality of subcarriers. The wireless device selects a first local oscillator frequency with the smallest cost function to use for wireless communications. The wireless device performs wireless communications through the plurality of subcarriers using the first local oscillator frequency.

Provided herein are apparatus and methods for wideband receivers. In certain configurations, a radio frequency (RF) communication system includes two or more receiver slices that operate in parallel with one another to process an RF input signal. The receiver slices generate digital signals by processing different sub-bands of the RF input signal. For example, the RF communication system can include a first receiver slice that processes a first sub-band of the RF input signal and that generates a first digital signal representing the first sub-band, and a second receiver slice that processes a second sub-band of the RF input signal and generates a second digital signal representing the second sub-band. The RF communication system further includes a clock generation circuit that generates one or more clock signals to control timing of the receiver slices, and a sub-band processing circuit that processes the digital signals from the receiver slices.

In an embodiment, an apparatus included in a communications system includes a transmit section including a first baseband section and a first radio frequency (RF) section, wherein the transmit section is configured to receive a calibration signal, the first RF section is configured to generate a RF calibration signal based on the calibration signal, and wherein the calibration signal comprises an orthogonal code based signal; and a receive section configured to receive the RF calibration signal over-the-air, wherein the receive section includes a second RF section and a calibration section, wherein the second RF section is configured to generate a received calibration signal based on the RF calibration signal, and wherein the calibration section is configured to determine one or more of gain, baseband delay, or RF delay compensation values, based on the inputs, to calibrate the transmit section.

An apparatus comprising a frequency standard circuit and a tracking circuit. The frequency standard circuit may be configured to generate an internal frequency standard and adjust the internal frequency standard in response to a tuning signal. The tracking circuit may be configured to receive a reference signal from an external source and a feedback signal of the internal frequency standard and generate the tuning signal. The tuning signal may be configured to synchronize the internal frequency standard to the reference signal. The internal frequency standard may be implemented local to a frequency converter. The tracking circuit may have a bandwidth that prevents unwanted content on the reference signal from corrupting the internal frequency standard.

Systems and methods are disclosed herein that relate to a wireless device that intelligently uses different reference crystal oscillators (XOs) for a Phase Locked Loop(s) (PLL(s)) in a transceiver of the wireless device. Embodiments of a method of operation of a wireless device comprising a first XO that operates at a first reference frequency and a second XO that operates at a second reference frequency that is greater than the first reference frequency are disclosed. In some embodiments, the method of operation of the wireless devices comprises making a decision as to whether to configure a receiver of the wireless device to use the first XO or the second XO and configuring the receiver of the wireless device to use the first XO or the second XO in accordance with the decision.

Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency f.sub.RF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency f.sub.XTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency f.sub.REF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

Systems and methods are disclosed herein that relate to a wireless device that intelligently uses different reference crystal oscillators (XOs) for a PhaseLocked Loop(s) (PLL(s)) in a transceiver of the wireless device. Embodiments of a method of operation of a wireless device comprising a first XO that operates at a first reference frequency and a second XO that operates at a second reference frequency that is greater than the first reference frequency are disclosed. In some embodiments, the method of operation of the wireless devices comprises making a decision as to whether to configure a receiver of the wireless device to use the first XO or the second XO and configuring the receiver of the wireless device to use the first XO or the second XO in accordance with the decision.

The present embodiments are directed to a device for generating radio frequency signals, including high power radio frequency signals. In certain embodiments, the device comprises multiple transmission lines driven in parallel at their input and connected in series at their output. The electromagnetic transit lengths of the transmission lines may be unequal. A series connection of the transmission lines at the output may produce an output signal from each transmission line driving the same polarity signal to the load. The series connection of transmission lines at the output may produce a bipolar output signal. One section of the device may convert a unipolar input signal into a bipolar signal. One section of the device may duplicate the input signal. Multiple sections may be arranged to convert a unipolar input signal into multiple radio frequency oscillations.

An RF frontend IC device includes an RF transceiver to transmit and receive RF signals and a frequency synthesizer to perform frequency synthetization to operate within a predetermined frequency band. The frequency synthesizer generates an LO signal to the RF transceiver to enable the RF transceiver to transmit and receive RF signals within the predetermined frequency band. The frequency synthesizer includes a QPG circuit to generate signals shifted in phases based on the LO signal and a phase shifting circuit to generate quadrant signals based on the signals shifted in phases. Each of the quadrant signals corresponds to one of the four quadrants in phases in the respective quadrant spaces. The phase shifting circuit includes multiple phase switches operable in a collaboration manner to further shift in phase based on the signal shifted in phases to generate the quadrant signals in proper quadrant spaces.

Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency f.sub.RF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency f.sub.XTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency f.sub.REF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.