A method for Co-Reception (Co-Rx) operation of multiple transceiver radios sharing the same antenna and Low Noise Amplifier (LNA) is provided. A first receiver radio of a wireless communication device determines the first gain mode of an LNA based on the first signal indicator. A second receiver radio of the wireless communication device determines the second gain mode of the LNA based on the second signal indicator. The LNA is shared by the first receiver radio and the second receiver radio and is coupled to an antenna. A Packet Traffic Arbitration (PTA) circuitry of the wireless communication device configures the LNA to operate in the first gain mode or the second gain mode based on the priority levels of the first receiver radio and the second receiver radio.

Methods related to radio frequency front end systems. In some embodiments, the method can include providing a first module configured to provide multi-input multi-output (MIMO) receive operations for a first plurality of mid bands and a first plurality of high bands. The first module can be further configured to provide transmit operations for the plurality of mid bands. The first module can include a first node. The method can include providing a second module configured to provide transmit and receive operations for a second plurality of mid bands and a second plurality of high bands. The second module can be a power amplifier integrated duplexer (PAiD) module. The second module can include a second node. The first module and the second module can be coupled by a signal path at the first node and the second node, respectively.

Disclosed herein are related to systems and methods for correcting non-linearity due to duty cycle error. In one aspect, a system includes a mixer configured to up-convert transmission (Tx) data, a coefficient calibrator configured to select a target value of a coefficient based on a measurement of an interference signal due to non-linearity of the mixer, and an interference canceller coupled to the coefficient calibrator and the mixer. In some embodiments, the interference canceller is configured to generate compensated Tx data based on the Tx data and the selected target value of the coefficient and provide the compensated Tx data to the mixer. In some embodiments, the compensated Tx data corrects for the non-linearity of the mixer.

A device comprises a digital ramp generator, an oscillator, a power amplifier, a low-noise amplifier (LNA), a mixer, and an intermediate frequency amplifier (IFA). The oscillator generates a chirp signal based on an output from the digital ramp generator. The power amplifier receives the chirp signal and outputs an amplified chirp signal to a transmitter antenna. The LNA receives a reflected chirp signal from a receiver antenna. The mixer receives output of the LNA and combines it with the chirp signal from the oscillator. The IFA receives the mixer output signal and includes a configurable high-pass filter, which has a first cutoff frequency during a first portion of the chirp signal and a second cutoff frequency during a second portion of the chirp signal. In some implementations, the first cutoff frequency is chosen based on a frequency of a blocker signal introduced by couplings between the transmitter and receiver antennas.

Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data specific to a processing mode selection. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to a specific processing mode selection. The processing mode selection may include a single processing mode, a multi-processing mode, or a full processing mode. The processing mode selection may be associated with an aspect of a wireless protocol. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.

A transceiver circuit includes a counter device, a compensation circuit and an adjusting circuit. The counter device is configured to count an execution time of a reception operation and accordingly generate a counting result. The compensation circuit is coupled to the counter device and configured to receive the counting result, determine a plurality of compensation values according to the counting result and sequentially output the compensation values in a transmission operation. The transmission operation follows the reception operation. The adjusting circuit is coupled to the compensation circuit, and configured to receive the compensation values and sequentially adjust amplitude of a signal according to the compensation values in the transmission operation. The compensation values are respectively applied to different portions of the signal.

An electronic device may include a wireless communication circuit, a battery, a power management integrated circuit (PMIC) electrically connected to the wireless communication circuit and the battery and including a regulator, and a processor electrically connected to the wireless communication circuit, the battery, and the PMIC. The processor may, responsive to the electronic device satisfying a specified condition, identify a change in a magnitude of a voltage of an output terminal of the regulator for a first time interval, identify a ratio of a time interval during which the change in the magnitude of the voltage of the output terminal satisfies a threshold value with respect to the first time interval, and adjust the magnitude of the voltage of the output terminal in a step-wise manner based on the ratio.

In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.

In some embodiments, stability in power amplifiers can be achieved under high in-band voltage standing wave ratio condition, with an amplifier circuit that includes an amplifier having a first stage and a second stage, with each stage including an input and an output, such that the output of the first stage is coupled to the input of the second stage. The amplifier circuit further includes a stabilizing circuit implemented on the input side of the second stage and configured to provide stability in operation of the amplifier under a high in-band voltage standing wave ratio condition.

Power amplification system with adjustable common base bias. A power amplification system can include a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The power amplification system can further include a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.