Examples described herein provide a radio frequency circuit. The radio frequency circuit includes a controller; a parameter estimator circuit; a capture circuit; and a pre-distorter circuit. The pre-distorter generally includes one or more nonlinear filter circuits and configurable hardware circuitry. Each of the one or more the nonlinear filter circuits includes: adder(s); multiplier(s); and memories coupled to at least one of the adder(s) and the multiplier(s); where the configurable hardware circuitry is configured to distort one or more input signals by directing the one or more input signals along a path through the one or more adders, the one or more multipliers, and the one or more memories and by distorting the one or input signals using the nonlinear parameters stored in the one or more memories as the one or more input signals travels the path.

Apparatus and method for detecting and clamping power of a power amplifier are disclosed. In certain embodiments, a power amplifier system includes a power amplifier that amplifies a radio frequency input signal to generate a radio frequency output signal, a bias circuit that controls a bias of the power amplifier, a radio frequency coupler that generates a radio frequency coupled signal based on the radio frequency output signal, a clamp that selectively clamps the bias of the power amplifier, and a power detector that controls the clamp based on the radio frequency coupled signal.

An antenna of a communication device includes a first antenna element operatively coupled to a transmitter of the communication device, the first antenna element configured to radiate a first signal generated by the transmitter; a second antenna element operatively coupled to a receiver of the communication device, the second antenna element configured to receive signals; and at least one third antenna element operatively coupled to at least one first reactive load, the at least one third antenna element configured to radiate a second signal modified in accordance with the at least one first reactive load, the second signal being induced at the at least one third antenna element by the first signal, and the at least one first reactive load being configured to modify the second signal to destructively cancel with a third signal induced at the second antenna element by the first signal.

Methods and devices are discussed. A device configured to operate in a network comprises communication circuitry and a transceiver.

An apparatus is disclosed for passive intermodulation distortion filtering. The apparatus includes a radio-frequency front-end circuit. The radio-frequency front-end circuit includes a transmit filter circuit and a receive filter circuit. The transmit filter circuit includes a passive circuit configured to combine at least two radio-frequency transmit signals associated with different transmit frequency bands. The transmit filter circuit also includes a filter coupled between the passive circuit and a first feed of an antenna. The filter is configured to attenuate frequencies associated with a receive frequency band. The receive filter circuit is coupled to a second feed of the antenna and is configured to pass the frequencies associated with the receive frequency band.

A method comprises obtaining a transmission signal to be power-amplified in a power amplifier (361) prior to transmission; separating the transmission signal into two or more polyphase components of the transmission signal; feeding one or more polyphase components of the transmission signal comprised in the two or more polyphase components to each of two or more parallel predistortion circuits (320,321,322); selecting a dedicated predistortion model and dedicated predistortion coefficients for each of the two or more parallel predistortion circuits (320,321,322); performing non-linear memory-based modeling on the transmission signal according to the selected dedicated predistortion models and coefficients using the one or more polyphase components; and combining output signals of the two or more parallel predistortion circuits (320,321,322) to form a predistorted transmission signal (y[n]) to be applied to the power amplifier (361).

Radio frequency systems and methods adjust power amplifier operation based on power amplifier operating mode or power level to achieve a tradeoff between improved linearity at lower power levels and improved out of band noise performance and coexistence at higher power levels.

Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive a configuration indicating one or more directions for applying directional digital pre-distortion (DPD) to mitigate interference in a direction to another UE. The UE may transmit a communication to a wireless node based at least in part on applying the directional DPD according to the configuration. Numerous other aspects are described.

The present disclosure relates to devices and methods for detecting and preventing occurrence of a saturation state in a power amplifier. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.

A PA module includes: a multilayer substrate having a ground pattern layer connected to a ground of a power source; amplifier transistors disposed on the multilayer substrate; a bypass capacitor having one end connected to the collector of the amplifier transistor; a first wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a second wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a third wiring line connecting the other end of the bypass capacitor and the ground pattern layer to each other; and a fourth wiring line formed between the amplifier transistor and the ground pattern layer and between the bypass capacitor and the ground pattern layer and connecting the first wiring line and the third wiring line to each other.