Devices, systems, and methods for multi-band radar sensing are disclosed. A method for operating an IC device involves setting a configuration of the IC device to select from available options of low-band and high-band operational modes, transmitting and receiving RF signals at a low-band frequency when the configuration of the IC device is set to the low-band operational mode, and transmitting and receiving RF signals at a high-band frequency when the configuration of the IC device is set to the high-band operational mode, wherein transmitting RF signals at the high-band frequency comprises upconverting a first signal at the low-band frequency to a second signal at the high-band frequency and wherein receiving RF signals at the high-band frequency comprises downconverting a third signal at the high-band frequency to a fourth signal at the low-band frequency, wherein the upconversion and the downconversion are implemented using a conversion signal at a conversion frequency.

Aspects of wireless communication are described, including a radiofrequency (RF) amplifier chip, configured for transmitting or receiving data, comprising a first substrate comprising a first material and a second substrate comprising a second material that is different from the first material. The first substrate and the second substrate may be lattice-matched such that an interface region between the first substrate and the second substrate exhibits an sp3 carbon peak at about 1332 cm.sup.1 having a full width half maximum of no more than 5.0 cm.sup.1 as measured by Raman spectroscopy. In some aspects, the first substrate and said second substrate permit said chip to transmit or receive data at a transfer rate of at least 500 megabits per second and a frequency of at least 8 GHz. In some aspects, the RF amplifier chip is part of a satellite transmitter.

Aspects of wireless communication are described, including a radiofrequency (RF) amplifier chip, configured for transmitting or receiving data, comprising a first substrate comprising a first material and a second substrate comprising a second material that is different from the first material. The first substrate and the second substrate may be lattice-matched such that an interface region between the first substrate and the second substrate exhibits an sp3 carbon peak at about 1332 cm.sup.1 having a full width half maximum of no more than 5.0 cm.sup.1 as measured by Raman spectroscopy. In some aspects, the first substrate and said second substrate permit said chip to transmit or receive data at a transfer rate of at least 500 megabits per second and a frequency of at least 8 GHz. In some aspects, the RF amplifier chip is part of a satellite transmitter.

A pair of programmable state machines may be included in a transmitter integrated circuit of a scanner (e.g. a body scanner) to control the sub-circuits of the transmitter integrated circuit. The first programmable state machine may be used to control the signal processor of the transmitter that facilitates generation of a signal to be transmitted at a target, such as a user to be scanned. The second programmable state machine may be used to control the transmitter's selection of a transmission channel for transmitting the signal in which provides the signal to be transmitted to an antenna. Further, the receiver integrated circuit of the scanner may include a similar pair of programmable state machines for controlling the receive signal processor and receiver of the receiver integrated circuit. The inclusion of the state machines can reduce both the scan time and the circuit complexity of the scanner.

A testing system includes: a bilinear polarized antenna for receiving and dividing a circularly polarized radio wave associating with a horizontal and a vertical polarization path of an object-to-be-tested into a first and a second high frequency signal; a phase retarder for delaying a phase of the first high frequency signal by 90 degrees to form a first high frequency signal with a phase delay of 90 degrees; a power splitter for receiving or synthesizing the first high frequency signal with the phase delay of 90 degrees and the second high frequency signal; and a high frequency signal transceiver for measuring power of the first high frequency signal with the phase delay of 90 degrees and the second high frequency signal and determining states of the horizontal and vertical polarization paths of the object-to-be-tested based on the power. Therefore, the testing system can speed up testing of the object-to-be-tested.

A transmitter circuit includes first and second carrier signal generators for generating corresponding first and second digital carrier signals, each having the same frequency. Modulation circuitry determines a phase shift value based on a received modulation signal. Outphasing circuitry generates a first digital output signal by adding the phase shift value to the phase of the first digital carrier signal and generates a second digital output signal by subtracting the phase shift value from the phase of the second digital carrier signal. A first switched-capacitor digital-to-analog converter (DAC) receives the first digital output signal and generates a first analog antenna output signal. A second switched-capacitor DAC receives the second digital output signal and generates a second analog antenna output signal. The sampling phases of the first and second DACs are opposite one another, whereby the first and second analog antenna output signals form a time-interleaved antenna output signal.

A pair of programmable state machines may be included in a transmitter integrated circuit of a scanner (e.g. a body scanner) to control the sub-circuits of the transmitter integrated circuit. The first programmable state machine may be used to control the signal processor of the transmitter that facilitates generation of a signal to be transmitted at a target, such as a user to be scanned. The second programmable state machine may be used to control the transmitter's selection of a transmission channel for transmitting the signal in which provides the signal to be transmitted to an antenna. Further, the receiver integrated circuit of the scanner may include a similar pair of programmable state machines for controlling the receive signal processor and receiver of the receiver integrated circuit. The inclusion of the state machines can reduce both the scan time and the circuit complexity of the scanner.

High efficiency amplitude DACs (Digital-to-Analog Converters) and RFDACs (Radio Frequency DACs) employing such amplitude DACs are discussed. One exemplary embodiment is a DAC comprising a plurality of DAC stages, wherein each DAC stage of the plurality of DAC stages is associated with a respective predetermined voltage of a plurality of predetermined voltages, wherein each DAC stage of the plurality of DAC stages can receive a digital signal at the respective predetermined voltage associated with that DAC stage when the respective predetermined voltage of that DAC stage is a selected predetermined voltage, wherein the selected predetermined voltage is based on an amplitude of the digital signal, and wherein each DAC stage of the plurality of DAC stages can generate a respective analog signal associated with that DAC stage based on the digital signal received at that DAC stage when the respective predetermined voltage of that DAC stage is the selected predetermined voltage.

Examples of receivers and receiver techniques are described herein. An example system may include a carrier source that may provide a wireless carrier signal and a wireless communication device, separate from the carrier source. The wireless communication device may provide a wireless communication signal containing data. A receiver may include an antenna positioned to receive the wireless carrier signal and the wireless communication signal, a two-port mixer coupled to the antenna and configured to mix the wireless carrier signal and the wireless communication signal to provide an intermediate frequency signal, and a demodulator configured to extract, at least in part, the data from the intermediate frequency signal.

A testing system includes: a bilinear polarized antenna for receiving and dividing a circularly polarized radio wave associating with a horizontal and a vertical polarization path of an object-to-be-tested into a first and a second high frequency signal; a phase retarder for delaying a phase of the first high frequency signal by 90 degrees to form a first high frequency signal with a phase delay of 90 degrees; a power splitter for receiving or synthesizing the first high frequency signal with the phase delay of 90 degrees and the second high frequency signal; and a high frequency signal transceiver for measuring power of the first high frequency signal with the phase delay of 90 degrees and the second high frequency signal and determining states of the horizontal and vertical polarization paths of the object-to-be-tested based on the power. Therefore, the testing system can speed up testing of the object-to-be-tested.