A radio frequency, RF, receiver circuit is configured to simultaneously monitor a two or more different RF frequencies. The RF receiver circuit uses a sub-sampler to sub-sample an RF signal that is at any of the monitored RF frequencies, and the sub-sampled signal is then demodulated and a digital code that was encoded in the RF signal is recovered. The RF receiver circuit may be particularly low power, in part owing to using the same sub-sampler for each of the two or more monitored RF frequencies, and not relying on superheterodyning. Furthermore, monitoring two or more different RF frequencies simultaneously means that signals received on the monitored RF frequencies may be acted on very quickly. These characteristics make the RF receiver circuit particularly suitable for use in low-power wake-up receivers, such as Bluetooth Low Energy (BLE) wake-up receivers.

A millimeter-wave phase array system may include massive heterodyne transceivers as its building elements. A transceiver of each element may include an IQ image rejection heterodyne transmitter and a receiver. Each transmitter may include a single DAC, a Tx I channel, and a Tx Q channel. Each receiver may include an Rx I channel, an Rx Q channel, and a single ADC. For Tx IQ image rejection calibration, amplitude and phase offsets are determined, using both the Tx I and Tx Q channels from a first element and using only one of the Rx I or Rx Q channel from a second element. The IQ channel imbalances are compensated using the offsets in analog domain. A similar procedure is used for Rx IQ image rejection calibration with alternated signal path enabling. A frequency response variation of an RF front end is detected with a single path Tx/Rx channel setup.

The disclosed systems and methods for detecting mirror crosstalk between frequency bands equally above and below the center frequency of a Digital Subcarrier Multiplexing system include: a transmitter configured to insert zero-power symbols on half the frequency bands below center frequency, and insert other zero-power symbols, partially overlapping in time with the first zero-power symbols, on the other half of the frequency bands above center frequency. A receiver zeroes out ASE and other noises during the overlapping portion of all the zero-power symbols, then uses the power detected during the remaining portion of each zero-power symbol in each frequency band to accurately evaluate the mirror crosstalk from the corresponding frequency band on the opposite side of center frequency.

An integrated circuit includes a plurality of signal inputs, a receiver, calibration circuitry, and input switch circuitry. The receiver includes differential input terminals. The calibration circuitry is configured to calibrate an input offset between the differential input terminals of the receiver in response to the integrated circuit being placed in a calibration mode. The input switch circuitry is configured to switch electrical connections between the plurality of signal inputs and the differential input terminals of the receiver in response to the integrated circuit being placed in a mode different from the calibration mode. The input switch circuitry is further configured to electrically disconnect the plurality of signal inputs from the differential input terminals of the receiver in response to the integrated circuit being placed in the calibration mode.

An apparatus is disclosed for implementing an antenna tuner. In an example aspect, the apparatus includes a substrate, an antenna disposed on or in the substrate, a radio-frequency integrated circuit disposed on the substrate, and an antenna tuner. The radio-frequency integrated circuit includes an amplification circuit. The antenna tuner is coupled between the antenna and the amplification circuit. The antenna tuner includes an inductive component disposed on or in the substrate and a capacitive component implemented within the radio-frequency integrated circuit.

A network communication power supply with digital signal isolation includes a transformer, a transformer drive circuit, a rectifier, and a modulation signal duty cycle detection circuit. The transformer has a primary side and a secondary side. The transformer drive circuit is coupled to the primary side, and receives a digital signal input. The transformer drive circuit converts the digital signal input into a drive signal with a duty cycle corresponding to a logic level of the digital signal input according to the logic level. The digital signal input includes a power content. The rectifier is coupled to the secondary side and converts the power content to provide a power source. The modulation signal duty cycle detection circuit is coupled to the rectifier and supplied power by the power source, and provides a digital signal output with a high or low level according to the duty cycle.

The present disclosure relates to a method for controlling a device comprising an oscillation circuit, configured to provide a clock signal to a radio frequency circuit, and an antenna, in which the enabling of the passage of the signal from the circuit to the antenna is delayed with respect to an instant from which a power amplifier of the circuit is enabled.

The invention relates to a method for calibrating a receiver comprising a plurality of analog reception channels each including an antenna element of a multi-element antenna, the plurality of analog reception channels comprising a reference channel, the method comprising determining (E1-E4) and correcting (E5), for each analog reception channel other than the reference channel, a phase shift with the reference channel, said determination comprising: calculating (E1) an observed covariance matrix (R.sub.ZZ.sup.t,e) representative of the covariance between samples (Z.sub.t.sup.e), collected in parallel on each of the analog reception channels over a period of time, of one or more incident reference radio signals on the multi-element antenna, obtaining (E2) an estimate () of a reference covariance matrix representative of the covariance between samples of said incident radio signal(s) which would be collected in parallel on each of the analog reception channels over the period of time in the absence of phase shift between the analog reception channels, calculating (E3) a product matrix (), resulting from the term-by-term matrix product of the observed covariance matrix with the estimate of the reference covariance matrix; determining (E4) the argument () of complex terms of the product matrix.

A circuit portion for a radio transceiver comprises: a power amplifier for use when the transceiver operates in a transmission mode, a low-noise amplifier for use when the transceiver operates in a reception mode, a voltage control circuit portion, and a transformer. The transformer comprises a primary winding with a terminal for connecting to an antenna, and a secondary winding comprising a first terminal, a second terminal and a third terminal located between the first and second terminals. The power amplifier is connected to the secondary winding, the low-noise amplifier is connected to both the primary and secondary windings and the voltage control circuit portion is connected to the third terminal of the secondary winding. The voltage control circuit portion applies a first voltage to the third terminal when the transceiver operates in the transmission mode and applies a second, different voltage when the transceiver operates in the reception mode.

Radio Frequency (RF) circuit (amplifiers, mixer, etc.) design with RFIC, e.g., implemented in CMOS, CaAs, SiGe, or other silicon processes, suffers performance variations (gain phase, frequency, bandwidth, nonlinearity) due to wafer process variations, temperature changes, and supply voltage changes, and random variations. In this invention, methods are proposed to precisely calibrate the bias current of all active devices in the system, and to precisely calibrate the gain of individual path leading to each amplifiers such that the same Pout is achieved for all antenna elements in the system.