Methods and system for using a multifunctional filter to minimize insertion loss in a multi-mode communications system are described. Specifically described is a multifunctional filter that is configurable to operate in a band-pass mode when a first type of signal is propagated through the multifunctional filter, and to operate in a low-pass mode when a second type of signal is propagated through the multifunctional filter. The multifunctional filter presents a lower insertion loss to the second type of signal when operating in the low-pass mode than in the band-pass mode.

A transceiver circuit is disclosed. The transceiver circuit includes an antenna, a receiver RF chain configured to receive a receiver RF signal from the antenna, a transmitter RF chain configured to transmit a transmitter RF signal to the antenna, and a controller configured to cause the receiver RF chain to receive a first distance estimate between the antenna and another transceiver circuit, to calculate a second distance estimate between the antenna and the other transceiver circuit, and to determine a range estimate between the antenna and the other transceiver circuit based on the first distance estimate and the second distance estimate.

A transceiver circuit is disclosed. The transceiver circuit includes an antenna, a receiver RF chain configured to receive a receiver RF signal from the antenna, a transmitter RF chain configured to transmit a transmitter RF signal to the antenna, and a controller configured to cause the receiver RF chain to receive a first distance estimate between the antenna and another transceiver circuit, to calculate a second distance estimate between the antenna and the other transceiver circuit, and to determine a range estimate between the antenna and the other transceiver circuit based on the first distance estimate and the second distance estimate.

A local oscillator buffer circuit comprises a complementary common-source stage comprising a first p-channel transistor (MCSP) and a first n-channel transistor (MCSN), arranged such that their respective gate terminals are connected together at a first input node, and their respective drain terminals of each of is connected together at a buffer output node. A complementary source-follower stage comprises a second p-channel transistor (MSFP) and a second n-channel transistor (MSFN), arranged such that their respective gate terminals are connected together at a second input node, and their respective source terminals are connected together at the buffer output node.

A local oscillator buffer circuit comprises a complementary common-source stage comprising a first p-channel transistor (MCSP) and a first n-channel transistor (MCSN), arranged such that their respective gate terminals are connected together at a first input node, and their respective drain terminals of each of is connected together at a buffer output node. A complementary source-follower stage comprises a second p-channel transistor (MSFP) and a second n-channel transistor (MSFN), arranged such that their respective gate terminals are connected together at a second input node, and their respective source terminals are connected together at the buffer output node.

A transceiver circuit is disclosed. The transceiver circuit includes an antenna, a receiver RF chain configured to receive a receiver RF signal from the antenna, a transmitter RF chain configured to transmit a transmitter RF signal to the antenna, and a controller configured to cause the receiver RF chain to receive a first distance estimate between the antenna and another transceiver circuit, to calculate a second distance estimate between the antenna and the other transceiver circuit, and to determine a range estimate between the antenna and the other transceiver circuit based on the first distance estimate and the second distance estimate.

A transceiver circuit is disclosed. The transceiver circuit includes an antenna, a receiver RF chain configured to receive a receiver RF signal from the antenna, a transmitter RF chain configured to transmit a transmitter RF signal to the antenna, and a controller configured to cause the receiver RF chain to receive a first distance estimate between the antenna and another transceiver circuit, to calculate a second distance estimate between the antenna and the other transceiver circuit, and to determine a range estimate between the antenna and the other transceiver circuit based on the first distance estimate and the second distance estimate.

A very low intermediate frequency receiver and methods for controlling the same. One method includes providing, using a local oscillator, a first intermediate frequency, detecting, using an interferer detector, an adjacent or alternate channel interference signal and an image of the adjacent or adjacent channel interference signal causing interference with a desired signal, and determining, using an electronic processor, whether the desired signal is an analog signal. In response to determining that the desired signal is an analog signal, the method includes controlling, using the electronic processor, the local oscillator to provide a second intermediate frequency. In response to determining that the desired signal is not an analog signal, the method includes determining, using the electronic processor, a switching condition based on the desired signal, and controlling, using the electronic processor, the local oscillator to provide the second intermediate frequency in response to determining the switching condition.

The present disclosure generally relates to multi-stage digital converters, including multi-stage digital down-converters (DDCs) and multi-stage digital up-converters (DUCs). In at least one example, the multi-stage digital down converter (DDC) comprises a plurality of stages, each stage comprising a frequency mixer and a decimation filter, and at least one controller coupled to one or more of the plurality of stages and operable to control one of the frequency mixer and decimation filter. In another example, the multi-stage digital up converter (DUC) comprises a plurality of stages, each stage comprising a frequency mixer and interpolation filter; at least one controller coupled to one or more of the plurality of stages and operable to control one of the frequency mixer and the interpolation filter.

A multi-antenna transceiver system is disclosed. The system comprises a group of transceiver chips, wherein each transceiver chip has a respective chip-associated (e.g., on-chip) frequency generator configured to provide a respective conversion frequency, and wherein each transceiver chip is configured to use the respective conversion frequency for on-chip frequency conversion of a transceiver signal. The system also comprises a controller adapted to cause configuration of the respective chip-associated frequency generator of at least one of the transceiver chips, wherein the configuration comprises dynamically setting the respective conversion frequency. In some embodiments, the controller comprises a single piece of circuitry separate from the transceiver chips. The single piece of circuitry is adapted to cause configuration of the respective chip-associated frequency generator of two or more of the transceiver chips.