Capturing, extracting and storing narrowband IQ data for later processing enables timely and efficient analysis. As wideband capture of RF information includes noise and non-signal elements, the present invention detects, extracts and stores narrowband IQ signals for later assessment. By transforming a high-volume data stream to a collection of smaller narrowband signals with greatly reduced storage and on-board processing requirements the present invention facilitates the capability to analyze signals of interest in an otherwise denied environment.

A radio frequency (RF) transceiver includes a reference signal source to generate a reference signal, a local RF source to generate a local RF signal and a mixed-signal phase/frequency detector to compare the reference signal to the local RF signal, and to generate a difference signal from the comparison, wherein the difference signal comprises a modulation component and an error component. The transceiver also includes a receiver front end to receive and downconvert an angle-modulated RF signal to a baseband signal, a quadrature modulator configured to angle-modulate the reference signal source with the baseband signal.

A radio frequency (RF) transceiver includes a reference signal source to generate a reference signal, a local RF source to generate a local RF signal and a mixed-signal phase/frequency detector to compare the reference signal to the local RF signal, and to generate a difference signal from the comparison, wherein the difference signal comprises a modulation component and an error component. The transceiver also includes a receiver front end to receive and downconvert an angle-modulated RF signal to a baseband signal, a quadrature modulator configured to angle-modulate the reference signal source with the baseband signal.

Methods and apparatus for simultaneous multiprotocol processing of different radio standards using a common pipeline. In an exemplary embodiment an apparatus includes a plurality of wireless interfaces that transmit radio data symbols, a scheduler that outputs scheduled events that control transmission of the radio data symbols using any wireless interface type and any radio protocol, and an event processor that processes the transmission events to transport the radio data symbols to selected wireless interfaces for over the air transmission using selected radio protocols.

A detector circuit includes: a squaring circuit configured to receive an output of a power amplifier of a radio transmitter and to produce an output current, the output of the power amplifier including: a desired tone; a local oscillator leakage tone; and an image tone, and the output current of the squaring circuit including: a direct current (DC) component including a function of the desired tone and an alternating current (AC) component; and a DC current absorber electrically connected to an output terminal of the squaring circuit, the DC current absorber being configured to filter out the DC component of the output current of the squaring circuit to produce a filtered output of the squaring circuit, the filtered output including the AC component including functions of the local oscillator leakage tone and the image tone.

According to one embodiment, a wireless communication apparatus includes receiver circuitry and transmitter circuitry. The receiver circuitry is configured to receive a first frame addressed to another apparatus, the first frame being transmitted by a first wireless communication apparatus, and estimate a difference between an oscillation frequency of an oscillator of the first wireless communication apparatus and an oscillation frequency of an oscillator of the wireless communication apparatus based on the first frame. The transmitter circuitry is configured to transmit a third frame at a frequency determined based on the difference during a period at least partially overlapping a period during which the first wireless communication apparatus transmits a second frame addressed to a second wireless communication apparatus.

Embodiments describe systems, apparatuses, and methods for transmitting/receiving signal data to/from a plurality of transceiver modules. Devices in accordance with some embodiments can include a plurality of wireless transceiver modules, each wireless transceiver module to be communicatively coupled to a corresponding external transceiver module, one or more antennas to exchange signal data with the plurality of external transceiver modules, a radio frequency (RF) circulator, and one or more amplifiers to amplify the signal data received by the one or more antennas and signal data to be transmitted by the one or more antennas. The use of circulator prevents transmitting signals that may collide with each other and cause interference with the communications.

A solution for security negotiation during handover of a user equipment (UE) between different radio access technologies is provided. In the solution, the UE receives non-access stratum (NAS) security information and access stratum (AS) security information which are selected by the target system and then performs security negotiation with the target system according to the received NAS security information and AS security information. As such, the UE may obtain the key parameter information of the NAS and AS selected by a Long Term Evolution (LTE) system and perform security negotiation with the LTE system when the UE hands over from a different system, such as a Universal Terrestrial Radio Access Network (UTRAN), to the LTE system.

There is provided mechanisms for transmitting adjusted signals. A method is performed by a radio communications device comprising at least two radio transmitter units. The method comprises generating a signal to be transmitted by the radio transmitter units. The method comprises adjusting the signal at at least one of the radio transmitter units by dithering at least one radio parameter value such that the signals from all radio transmitter units are mutually different. The method comprises transmitting the adjusted signal by the radio transmitter units.

A phase synchronization circuit includes: a first delay circuit that is capable of adjusting a first delay amount, delays a first reference clock signal by the first delay amount, and outputs a first delayed reference clock signal; a first clock control circuit that compares phases of the first delayed reference clock signal and a first output clock signal and generates a first clock control signal based on a result of the comparison; a first clock signal generation circuit that generates the first output clock signal based on the first clock control signal; and a first monitoring circuit that monitors jitter in the first output clock signal and adjusts the first delay amount based on a result of monitoring the jitter in the first output clock signal.