H04B3/06

TUNNING HIGH SPEED LINK PARAMETERS

A method for tunning high speed link parameters for cables with a transceiver at each end includes transmitting, in response to establishing a link, an eye pattern bit sequence from a first computing device to a second computing device over a cable with a transceiver connected to each end of the cable. Establishing the link includes establishing a communication link over the cable between the first computing device and the second computing device. The method includes receiving an eye pattern quality message from the second computing device using a device discovery protocol. The eye pattern quality message includes quality information of a received waveform corresponding to the transmitted eye pattern bit sequence. The method includes adjusting transmission parameters for transmission over the cable in response to the quality information, and retransmitting the eye pattern bit sequence using the adjusted transmission parameters.

COMMUNICATION SYSTEM, TRANSMISSION DEVICE, AND RECEPTION DEVICE
20210359716 · 2021-11-18 ·

A communication system includes: a transmission device including a transmission data generator, a pattern generator, a transmitter, and a control signal receiver, the transmission data generator that is configured to generate transmission data, the pattern generator that is configured to generate an alternate pattern alternating at every lapse of a predetermined time, the transmitter that includes a first equalization circuit and is configured to transmit a transmission signal including the transmission data and the alternate pattern, the first equalization circuit that is configured to adjust equalization characteristics on the basis of first instruction information, and the control signal receiver that is configured to receive the first instruction information; and a reception device including a receiver, a first detector, and a control signal transmitter, the receiver that is configured to receive the transmission signal, the first detector that is configured to detect a frequency component corresponding to the predetermined time of the alternate pattern included in the transmission signal, and the control signal transmitter that is configured to generate the first instruction information on the basis of a result of detection by the first detector and is configured to transmit the first instruction information.

Crosstalk amelioration systems and methods in a radio frequency front end (RFFE) communication system

Crosstalk amelioration systems and methods in a radio frequency front end (RFFE) communication system provide a host or master of an RFFE bus to monitor a weakly-driven data line in the RFFE bus while a clock line is actively providing a clock signal for trigger events at one or more slaves on the RFFE bus. If the host detects noise on the data line that looks like a sequence start condition (SSC) signal, the host further signals on the data line to negate the impact of the false SSC signal and thus avoid misinterpretation by the slaves.

Crosstalk amelioration systems and methods in a radio frequency front end (RFFE) communication system

Crosstalk amelioration systems and methods in a radio frequency front end (RFFE) communication system provide a host or master of an RFFE bus to monitor a weakly-driven data line in the RFFE bus while a clock line is actively providing a clock signal for trigger events at one or more slaves on the RFFE bus. If the host detects noise on the data line that looks like a sequence start condition (SSC) signal, the host further signals on the data line to negate the impact of the false SSC signal and thus avoid misinterpretation by the slaves.

Extendable wire-based data communication cable assembly
11177855 · 2021-11-16 ·

Various implementations of a data communication cable assembly are disclosed that improve the transmission of data signals that traverse long distances. Some cable assembly implementations are configured to transmit data signals via one or more electrical wire mediums and one or more signal extenders that modify the data signals for improved transmission between devices over one or more electrical wire mediums. Other cable assembly implementations are configured to transmit data signals via one or more optical transmission mediums and optical-to-electrical and electrical-to-optical converters for improved transmission of the data signals between devices. Other cable assembly implementations are configured for cascading or daisy-chaining together for transmitting data signals between devices in the optical and/or electrical domain.

Extendable wire-based data communication cable assembly
11177855 · 2021-11-16 ·

Various implementations of a data communication cable assembly are disclosed that improve the transmission of data signals that traverse long distances. Some cable assembly implementations are configured to transmit data signals via one or more electrical wire mediums and one or more signal extenders that modify the data signals for improved transmission between devices over one or more electrical wire mediums. Other cable assembly implementations are configured to transmit data signals via one or more optical transmission mediums and optical-to-electrical and electrical-to-optical converters for improved transmission of the data signals between devices. Other cable assembly implementations are configured for cascading or daisy-chaining together for transmitting data signals between devices in the optical and/or electrical domain.

ADAPTIVE EQUALIZATION DEVICE, ADAPTIVE EQUALIZATION METHOD, AND COMMUNICATION DEVICE

First compensation circuitry includes a first digital filter compensating a phase difference between a phase of a symbol of a received signal and a sampling timing, and first filter coefficient calculation circuitry calculating a filter coefficient of the first digital filter as a first filter coefficient. Second filter coefficient calculation circuitry calculates, as a second filter coefficient, a filter coefficient for adaptive equalization that compensates distortion due to temporally changing polarization dispersion, based on an output of the first digital filter. Coefficient combination circuitry combines the first filter coefficient and the second filter coefficient. Second compensation circuitry includes a second digital filter which uses a filter coefficient combined by the coefficient combination circuitry and performs a compensation of the phase difference between the phase of the symbol of the received signal and the sampling timing, and a process of the adaptive equalization at the same time.

De-emphasis controller for transmit driver in wireline communication
11165610 · 2021-11-02 · ·

Various embodiments relate to a de-emphasis (DE) controller in a wireline transmitter, including: a digital decoder configured to receive a DE control value and configured to produce a bias control value, an N1 control value, and an N2 control value; a bias controller configured to vary the bias current for a de-emphasis circuit based upon the bias control value; an N1 controller configured to activate a number of N1 unit cells in a delayed line driver based upon the N1 control value; and an N2 controller configured to activate a number of N2 unit cells in a non-delayed line driver based upon the N2 control value, wherein the N1 control value plus the N2 control value varies for different DE control values, and wherein the bias control value is based upon the N1 control value plus the N2 control value.

De-emphasis controller for transmit driver in wireline communication
11165610 · 2021-11-02 · ·

Various embodiments relate to a de-emphasis (DE) controller in a wireline transmitter, including: a digital decoder configured to receive a DE control value and configured to produce a bias control value, an N1 control value, and an N2 control value; a bias controller configured to vary the bias current for a de-emphasis circuit based upon the bias control value; an N1 controller configured to activate a number of N1 unit cells in a delayed line driver based upon the N1 control value; and an N2 controller configured to activate a number of N2 unit cells in a non-delayed line driver based upon the N2 control value, wherein the N1 control value plus the N2 control value varies for different DE control values, and wherein the bias control value is based upon the N1 control value plus the N2 control value.

Multi-bitrate video with dynamic blocks
11777556 · 2023-10-03 · ·

Methods, systems, computer-readable media, and apparatuses for providing dynamic block control of multi-bitrate video are described. In some embodiments, a computing device may determine transcoder conditions of a transcoder independent of a client device. The computing device may dynamically adjust a block size of one or more blocks of a stream based on the transcoder conditions. In some embodiments, a computing device may receive a stream. The client device may package the stream into a first packaged stream having a first block size and a second packaged stream having a second block size less than the first block size. In some embodiments, a client device may determine an actual minimum number of blocks to buffer prior to initiating content playback based on a received predicted network and/or transcoder quality of service forecast. The client device may adjust its preset minimum number of blocks to the actual minimum number of blocks.