A method includes sending, by a master beacon device and one or more beacon repeater devices, ultra-wideband (UWB) beacon frames. The UWB beacon frames are transmitted as interleaved pairs of UWB beacon frames. Each interleaved pair includes a first UWB beacon frame and a second UWB beacon frame. For each interleaved pair, the first UWB beacon frame and the second UWB beacon frame are transmitted with a master time delay. The method further includes receiving, by one or more tag devices, at least one of the interleaved pairs of UWB beacon frames.

A method includes sending, by a master beacon device and one or more beacon repeater devices, ultra-wideband (UWB) beacon frames. The UWB beacon frames are transmitted as interleaved pairs of UWB beacon frames. Each interleaved pair includes a first UWB beacon frame and a second UWB beacon frame. For each interleaved pair, the first UWB beacon frame and the second UWB beacon frame are transmitted with a master time delay. The method further includes receiving, by one or more tag devices, at least one of the interleaved pairs of UWB beacon frames.

An embodiment of the present invention relates to an ultra low power wideband asynchronous binary phase shift keying (BPSK) demodulation method and a circuit configuration thereof. The ultra low power wideband asynchronous BPSK demodulation circuit comprises a sideband division and upper sideband signal delay unit dividing a modulated signal into an upper sideband and a lower sideband by a first order high-pass filter and a first order low-pass filter; a data demodulation unit latching, through a hysteresis circuit, a signal generated by a difference between the analog signals in which a phase difference between the delayed upper sideband analog signal and the lower sideband analog signal is aligned at 0, so as to demodulate digital data; and a data clock recovery unit for generating a data clock by using a signal digitalized from the lower sideband analog signal through a comparator and a data signal.

An embodiment of the present invention relates to an ultra low power wideband asynchronous binary phase shift keying (BPSK) demodulation method and a circuit configuration thereof. The ultra low power wideband asynchronous BPSK demodulation circuit comprises a sideband division and upper sideband signal delay unit dividing a modulated signal into an upper sideband and a lower sideband by a first order high-pass filter and a first order low-pass filter; a data demodulation unit latching, through a hysteresis circuit, a signal generated by a difference between the analog signals in which a phase difference between the delayed upper sideband analog signal and the lower sideband analog signal is aligned at 0, so as to demodulate digital data; and a data clock recovery unit for generating a data clock by using a signal digitalized from the lower sideband analog signal through a comparator and a data signal.

In an embodiment a real-time location method includes sending and receiving ultra-wideband frames using an exchange protocol based on an ultra-wideband frame format, wherein the exchange protocol defines a location rate frame format including a beacon section having a series of time slots associated to at least one frame of interleaved pairs of beacon frames, wherein a first beacon frame and a second beacon frame of each pair are separated in time by a master time delay, and wherein, between time slots assigned to the beacon frames of an opening pair having an initial one of the beacon frames within the beacon section, an array of time slots is respectively assigned to the first beacon frames of the remaining pairs, and a tag response section including a sequence of time slots associated to tag response frames.

A real-time location system includes a master beacon device, a plurality of tag devices, a plurality of tag response receptor units, and a distance determination unit. The master beacon device includes a beacon transmission unit, a master clock, and a master storage unit configured to store a master time delay data. Each tag device includes a tag clock, a reception unit, a tag data storage unit, a reference time point, a tag-specific emission time delay data associated to the respective tag device and the reference time point, a calibration and calculation unit, and a tag response emission unit. Each tag response receptor unit includes a receptor clock defining a respective receptor time. The distance determination unit includes a data storage unit and a calculation unit.