The present disclosure relates to a system for at least one of identifying or verifying which specific data center device, from a plurality of data center devices, is being powered from an AC outlet of a power distribution unit. The system includes a message encoding algorithm module, a message decoding algorithm module and an input signal monitoring subsystem. The input signal monitoring subsystem monitors an AC power signal being supplied to the data center devices, wherein one of the data center devices includes an AC powered target device. A power distribution unit (PDU) supplies the AC power signal to the AC powered target device. The PDU has a controller which uses the message encoding algorithm to create a modulated AC power signal that includes an encoded message in accordance with a predetermined power cycle profile (PCP) event. The target device analyzes the PCP event as the modulated AC power signal is received and creates a decoded message therefrom. The decoded message is used to indicate whether the AC outlet of the PDU is providing power to the target device.

A time synchronization method, applied to a power-line communication (PLC) network that includes a head end node and at least one tail end node coupled to the head end node. The method includes the head end node generates data about voltage zero-crossing points based on reference time, where the data about the voltage zero-crossing points includes zero-crossing time points of the voltage zero-crossing points. When a first timing point arrives, the head end node sends first information to the tail end node, where the first information includes a timestamp of a first zero-crossing point, the first zero-crossing point is a voltage zero-crossing point closest to the first timing point, and the timestamp of the first zero-crossing point is used by the tail end node to determine a zero-crossing time point of a second zero-crossing point.

Systems, methods, and processor readable media for distributing digital data and electrical power to a plurality of devices over high-impedance cables are disclosed. Certain embodiments include a gateway device connected to a power source, a first device connected to the gateway device by a cable, the cable being a high-impedance cable having at least two conductive paths, and wherein the first device receives electrical power and digital data from the gateway device via the cable over the same conductive path of the cable, a second device connected to the gateway device by the cable wherein the second device receives power and digital data from the gateway device via the cable over the same conductive path, and wherein the power source provides power to the first and second devices via the cable, and wherein the second device is connected to the gateway device through the first device via a daisy-chain topology.

Systems, methods, and processor readable media for distributing digital data and electrical power to a plurality of devices over high-impedance cables are disclosed. Certain embodiments include a gateway device connected to a power source, a first device connected to the gateway device by a cable, the cable being a high-impedance cable having at least two conductive paths, and wherein the first device receives electrical power and digital data from the gateway device via the cable over the same conductive path of the cable, a second device connected to the gateway device by the cable wherein the second device receives power and digital data from the gateway device via the cable over the same conductive path, and wherein the power source provides power to the first and second devices via the cable, and wherein the second device is connected to the gateway device through the first device via a daisy-chain topology.

In one embodiment, a method includes transmitting pulse power on two wire pairs, the pulse power comprising a plurality of high voltage pulses with the high voltage pulses on the wire pairs offset between the wire pairs to provide continuous power, performing low voltage fault detection on each of the wire pairs between the high voltage pulses, and transmitting data on at least one of the wire pairs during transmittal of the high voltage pulses. Data transmittal is suspended during the low voltage fault detection.

Instead of the method of performing the power disconnection in the existing phase angle control AC power line communication, using relays or various power semiconductor devices, if communication is executed through data mapping on a pattern where polarity switching (in the case of AC, phase-shifting by 180°) occurs at a differential voltage level of a power line, no power disconnection occurs and high voltage interval is utilized so that the power line communication is strongly resistant to external noise and provides high communication speed, while transmitting several bits in one period of AC voltage waveform. This solves the disadvantages the existing classical condenser coupling type power line communication and the phase angle control AC power line communication for long distance have had. Even though the power line communication is utilized for DC power line communication, many advantages are obtained and high power transmission efficiency is achieved through the relays.

Systems, methods, and processor readable media for distributing digital data and electrical power to a plurality of devices over high-impedance cables are disclosed. Certain embodiments include a gateway device connected to a power source, a first device connected to the gateway device by a cable, the cable being a high-impedance cable having at least two conductive paths, and wherein the first device receives electrical power and digital data from the gateway device via the cable over the same conductive path of the cable, a second device connected to the gateway device by the cable wherein the second device receives power and digital data from the gateway device via the cable over the same conductive path, and wherein the power source provides power to the first and second devices via the cable, and wherein the second device is connected to the gateway device through the first device via a daisy-chain topology.

In a method for operating a device comprising an internal clock generator and an internal clock and being connected to a network, the internal clock is incremented by the internal clock generator. Moreover, the internal clock is synchronized with a network frequency of the network.

Techniques for computing electrical phase of electrical metering devices are described. In an example, data indicating zero-crossing times at first and second metering devices is obtained. A time-difference between the zero-crossing times may be determined. In a first example, the time-difference may be based at least in part on calculations involving a first value of a first free-run timer on a first metering device, a second value of a second free-run timer on a second metering device, and a time of a transmission between the metering devices. In a second example, the time-difference may be based at least in part on calculations involving a start or end time of a time-slot of a spread spectrum radio frequency transmission scheme. A phase difference between the first zero-crossing and the second zero-crossing may be determined, based at least in part on the determined time-difference.

Provided is a zero crossing point signal output method, including: continuously receiving zero crossing point square wave signals, and periodically sampling zero crossing point square wave signals at a predetermined sampling frequency; acquiring sampling numbers of 1.sup.st to M.sup.th zero crossing point square wave signals to obtain an average sampling number S, and calculating a first zero crossing point interval T1; setting a zero crossing point signal output interval as the first zero crossing point interval T1; continuously outputting zero crossing point signals with an interval being the zero crossing point signal output interval; obtaining sampling numbers of M+1.sup.th to M+N.sup.th zero crossing point square wave signals, calculating a difference value between each of the sampling numbers and S, and obtaining an accumulated difference value Δs through calculation; when Δs is not within a predetermined change range, obtaining a second zero crossing point interval T2 and setting the zero crossing point signal output interval as T2; and when Δs is within the predetermined change range, keeping the zero crossing point signal output interval unchanged.