A method or an arrangement for the clock synchronization of a plurality of distributed modules of an information or communication system where said modules are coupled via a packet-switched network is adapted so that at least two of said modules are controlled by a local clock generator of the modules using an adjustable frequency, and a clock signal is transmitted via the network in the form of clock signal packets. One of said at least two modules takes over the function of a master module, and all remaining modules synchronize the local clock of the modules with the clock of the master module.

Techniques for performing time synchronization within a network include a method comprising: determining, by a first node, a receive time at which a periodic beacon from a second node is expected to be received based on timing information associated with the second node; determining, by the first node, a first listening window for the periodic beacon based on the receive time and one or more of a drift uncertainty associated with an anticipated drift in a correction of a timing error between the first node and the second node or a jitter uncertainty associated with timing jitter in the first node or the second node; and listening, by the first node, for the periodic beacon during the first listening window.

An electronic device is provided including a processor, a communications interface coupled to the processor, a memory coupled to the processor, and a module saved in the memory. The module configures the processor to receive a first communications packet from a remote device via the communications interface including information useful for estimating a clock offset of the remote device, and determine an upper bound of the clock offset of the remote device with respect to the electronic device based on the information.

We disclose an interface device configured to inter-convert CPRI data frames and Optical Transport Units (OTUs). The interface device acquires frame synchronization by temporarily storing data in a buffer bank such that translated sync characters are placed at respective predetermined locations within the buffer bank. Each translated sync character represents, in the corresponding OTU, a respective sync character of a CPRI hyperframe. The interface device is configured to distinguish translated sync characters from payload-data words of identical value based on predetermined alignment, in the buffer bank, of data temporarily stored therein for conversion into the CPRI data format. The interface device advantageously enables multiplexing of a plurality of CPRI links and aggregation and encapsulation of the multiplexed CPRI data into a stream of OTUs for transmission to the intended destination over an Optical Transport Network.

Exemplary embodiments for updating a controller of a primary device of a power substation. An actual time is received from a time server via a cell phone communication network with a mobile device and the actual time is sent with the mobile device via a local wireless communication network to the controller.

In some embodiments, a system comprises a clock, a root node, a radio channel network, and first and second child nodes. The clock may be configured to generate a clock signal. The root node may be configured to generate a first frame including a first payload and a first overhead and generate a second frame including a second payload and a second overhead. The first and second overheads may comprise a synchronization value based on the clock signal. The radio channel network may be in communication with the root node for transmitting the first and second frames. Each first and second child nodes may be configured to perform clock recovery including frequency synchronization using the synchronization value and a respective phase-lock loop.

A multilevel modulation optical transceiver for distributing an OTN frame defined by ITU-T to a plurality of lanes for transmission, the multilevel modulation optical transceiver including: an MLD transmission unit; and a data replication unit, further including a data rearrangement unit arranged at a preceding stage of the MLD transmission unit, for performing data rearrangement processing of replicating, in advance, a frame synchronization pattern of an overhead of the OTN frame before being subjected to the lane rotation processing from a first lane that has the overhead to another lane that does not have the overhead, and of saving a payload to be overwritten with the frame synchronization pattern to a reserved area of the overhead to enable the payload to be restored on a reception side.

A method and apparatus of detecting a frame boundary by using a preamble are provided. The method includes delaying the preamble by a predetermined length of time, wherein the preamble includes an LTF and a code of the (n+1)th one of 2n sync sequences of the LTF is the inverse of a code of the last one of the sync sequences of STF; calculating a correlation value between the preamble and the delayed preamble; and detecting a frame boundary by comparing the correlation value with a threshold correlation value.

A time synchronization method for a wireless load testing system includes two stages: a stage of constructing a wireless sensor network system and a stage of suppressing communication delay to achieve precise network-wide time synchronization. The method employs a relative skew estimator based on Bayesian estimation theory to suppress the effect of time delay in wireless communication, thereby enhancing the estimation accuracy of the relative skew estimator while reducing memory requirements. By applying the average consensus protocol, high-precision network-wide time synchronization is achieved, and the overall method enhances the robustness to time delay and has higher accuracy. The method solves the problems of reduced time synchronization accuracy and time synchronization failure of partial sub-nodes due to time delay of the traditional time synchronization algorithms in complex spatial layout.

A wireless network includes a wireless transmitter to multiply data bits with a spreading code to generate spread data, prepend a synchronization word, and transmit a pair of null frames via an anchor wireless device to jam a ping reflector device for each chip of a one value being transmitted. A receiver transmits, via the anchor wireless device, a ping packets to the ping reflector device at a particular ping rate and receives ping acknowledgement packets from the ping reflector device in response to the transmitted ping packets. Each pair of null frames causes a spike in the ping acknowledgment packets that are received, indicating receipt of a chip of the one value. In response to correlating the synchronization word within ones of the ping acknowledgment packets, the receiver begins use of the spreading code to decode the spread data encoded within subsequently received ones of the ping acknowledgement packets.