Patent classifications
H04J3/0635
Timing calibration control in extended discontinuous reception
Methods, systems, and devices for wireless communication in a user equipment (UE) are described in which a cycle duration of an extended discontinuous reception (eDRX) cycle is determined. The UE enters a sleep state of the eDRX cycle and, based on the determination of the cycle duration, uses a first clock as a timer during the sleep state and uses a second clock as a timing calibrator during the sleep state. The first clock may have a lower power consumption and a higher frequency error, and the second clock may have a higher power consumption and a lower frequency error.
DEVICES AND METHODS CONTROLLING A RADIO FREQUENCY PATH
According to an embodiment, a device includes an interface configured to receive a first clock signal. A delay circuit is configured to add variable delays to the first clock signal based on a delay control signal to generate a second clock signal with variable delays. A delay control signal is generated by a controller clocked by the second clock signal. The device further includes a radio frequency path, and the device is configured to control the radio frequency path based on the second clock signal.
RECEIVER-SIDE BUFFERING FOR TIME-AWARE SCHEDULING ACROSS CELLULAR LINK
Apparatus and methods of wireless communications include, at a receiving node, receiving timing information corresponding to a traffic class identifier. The timing information being associated with a time interval for communicating data of a traffic class corresponding to the traffic class identifier. Aspects include receiving traffic data pertaining to the traffic class, determining that the traffic data was transmitted or is received outside the time interval, and then buffering the traffic data. Additionally, aspects include forwarding the traffic data in response to a next occurrence of the time interval. A transmitting node may be configured with complimentary functions.
TRANSMITTER, RECEIVER, AND CLOCK TRANSFER METHOD
A transmitter includes a memory, and a processor configured to generate a first clock parallel signal by performing serial-parallel conversion of a first clock signal acquired by using a reference clock and generate a second clock parallel signal by performing serial-parallel conversion of a second clock signal acquired by using the reference clock, generate first compressed information by compressing the first clock parallel signal on the basis of clock periodicity and generate second compressed information by compressing the second clock parallel signal based on the clock periodicity, generate a serial signal by adding a synchronization signal indicating a top of a multiplexed signal to the multiplexed signal generated by time-division multiplexing of the first compressed information and the second compressed information, and transmit the serial signal to a receiver.
Methods of estimating frequency skew in networks using timestamped packets
Methods of estimating frequency skew in a packet network include determining a representation of a packet delay variation (PDV) sequence from an initial estimate of frequency skew between master and slave devices in the packet network and timestamps transmitted therebetween. An operation is performed to extract a statistical mode from an empirical probability distribution function (PDF) of the representation of the PDV sequence, where the statistical mode corresponds to a value at which the PDF has its maximum value. The, an updated estimate of the frequency skew is generated by determining a slope between timestamps at indices associated with a plurality of points in the representation of the PDV sequence that are within a range of the statistical mode.
DISPLAY METHOD AND DISPLAY APPARATUS
A display method is for a display apparatus to display an image, and includes: obtaining a captured display image by an image sensor included in a terminal device; obtaining a light ID by visible light communication with a subject; obtaining an AR image and recognition information which are associated with the light ID from a memory included in the terminal device; recognizing a target region within the captured display image using the recognition information; and displaying the captured display image in which the AR image is superimposed on the target region.
Synchronization mechanism for high speed sensor interface
A sensor may determine a sampling pattern based on a group of synchronization signals received by the sensor. The sampling pattern may identify an expected time for receiving an upcoming synchronization signal. The sensor may trigger, based on the sampling pattern, a performance of a sensor operation associated with the upcoming synchronization signal. The performance of the sensor operation may be triggered before the upcoming synchronization signal is received.
Transmission method, reception method, transmission apparatus, and reception apparatus that utilize an object IP packet containing first reference clock information that indicates time for reproduction of content in a data structure different from a structure of a MPEG media transport (MMT) packet
A transmission method includes generating one or more frames for content transfer using IP packets, and transmitting the one or more generated frames by broadcast. Each of the one or more frames contains a plurality of second transfer units, each of the plurality of second transfer units contains one or more first transfer units, each of the one or more first transfer units contains at least one of the IP packets, an object IP packet of the IP packets contains first reference clock information indicating time for reproduction of the content in data structure different from MMT packet data structure, the object IP packet being stored in a first transfer unit positioned at a head in the one or more frames, the one or more frames contains control information storing second reference clock information indicating time for reproduction of the content, and header compression processing on the object IP packet is omitted.
METHODS AND SYSTEMS FOR ACCURATE AND ACCELERATED SYNCHRONIZATION FOR COMMUNICATION NETWORKS
The present invention contemplates a method and/or system for accurately and accelerated synchronization of communication networks. The method contemplates providing a virtual clock module in which all nodes of a network use the module in an identical manner and wherein the virtual clock module of nodes is generally a data stream whose element is the virtual time with whatever notice made is in communication with at that instant. In a preferred embodiment of the invention, the method or system is processed using a finite impulse filter. The virtual clock in each node is responsible for generating a stream of data in which one may consider as virtual time. Each sample of the discrete time stream is constructed by its nearest neighbor of the node concerned communicating the current sample of its own virtual time stream to the node.
Method for periodically measuring data in a real time computer system and real-time computer system
A method is provided for the periodic detecting of measured values in a distributed real-time computer system, which comprises a plurality of intelligent sensors, node computers, and distribution units, wherein the intelligent sensors, the node computers, and the distribution units have access to a global time, wherein real-time data is transported in the real-time computer system by time-triggered real-time messages, wherein periodically recurring global observation instants are established or will be established in the real-time computer system at the beginning of a frame, wherein each node computer controlling a physical sensor outputs a trigger signal to the the physical sensor at a sensor-specific trigger instant of the sensor controlled by the node computer, which specific trigger instant is calculated from the difference between the global observation instant and a sensor-specific startup interval.