H04J3/0635

SYNCHRONIZATION MECHANISM FOR HIGH SPEED SENSOR INTERFACE
20210143928 · 2021-05-13 ·

A sensor may determine a sampling pattern based on a group of synchronization signals received by the sensor. The sampling pattern may identify an expected time for receiving an upcoming synchronization signal. The sensor may trigger, based on the sampling pattern, a performance of a sensor operation associated with the upcoming synchronization signal. The performance of the sensor operation may be triggered before the upcoming synchronization signal is received.

Method for Synchronizing Network Device, and Network Device
20210212003 · 2021-07-08 ·

A method for synchronizing a network device includes: receiving, by the network device, a first SSM and a second SSM, where the first SSM carries a first SSM code for indicating a quality level of a first clock source and a first eSSM code for indicating the quality level of the first clock source, and the second SSM carries a second SSM code for indicating a quality level of a second clock source and a second eSSM code for indicating the quality level of the second clock source. When a value of the first SSM code is less than a value of the second SSM code, the network device calibrates a frequency of the network device based on a timing signal of the first clock source.

Transmitter, receiver, and clock transfer method

A transmitter includes a memory, and a processor configured to generate a first clock parallel signal by performing serial-parallel conversion of a first clock signal acquired by using a reference clock and generate a second clock parallel signal by performing serial-parallel conversion of a second clock signal acquired by using the reference clock, generate first compressed information by compressing the first clock parallel signal on the basis of clock periodicity and generate second compressed information by compressing the second clock parallel signal based on the clock periodicity, generate a serial signal by adding a synchronization signal indicating a top of a multiplexed signal to the multiplexed signal generated by time-division multiplexing of the first compressed information and the second compressed information, and transmit the serial signal to a receiver.

Time correction using extension fields
11057136 · 2021-07-06 · ·

A network device receives a packet that conforms to a protocol that i) defines a time stamp field, ii) does not define a dedicated field for time correction information, and iii) defines a plurality of general purpose extension fields. The packet includes (i) a time stamp generated by a source node in the time stamp field, and (ii) a time correction value corresponding to multiple ones of the plurality of intermediate nodes, the time correction value being located in one of the general purpose extension fields. The network device identifies (i) a time specified by the time stamp, and (ii) time correction information specified in the one general purpose extension field, and uses the time correction information and the time specified by the time stamp to synchronize a clock maintained by the network device to a clock maintained by the source node.

Method for updating clock synchronization topology, method for determining clock synchronization path, and device

A method for determining a clock synchronization path, and a device, where the method includes determining a first clock synchronization path from a clock injection node of the first network to the first network element based on a request of the first network element and the clock synchronization topology of the first network. A clock synchronization topology is automatically updated based on clock synchronization capability information of a network element, and a clock synchronization path is determined to reduce costs of deploying a clock synchronization path.

Synchronization mechanism for high speed sensor interface
10892841 · 2021-01-12 · ·

A sensor may determine a sampling pattern based on a group of synchronization signals received by the sensor. The sampling pattern may identify an expected time for receiving an upcoming synchronization signal. The sensor may trigger, based on the sampling pattern, a performance of a sensor operation associated with the upcoming synchronization signal. The performance of the sensor operation may be triggered before the upcoming synchronization signal is received.

EFFICIENT TRANSMISSION OF A RESPONSE SIGNAL FOR A RANDOM ACCESS PREAMBLE TRANSMITTED FROM LEGACY OR EXTENSION CARRIER CAPABLE DEVICES

In order to provide a transmission device and transmission method with which a response signal for random access preamble transmitted from a preamble transmission device is efficiently transmitted, setting unit in base station sets a first resource candidate group, which enables terminal capable of receiving a latch response transmitted by demodulation reference signal (DMRS) transmission to be selected, and a second resource candidate group, which enables terminal incapable of receiving a latch response transmitted by DMRS transmission but capable of receiving a latch response transmitted by cell-specific reference signal (CRS) transmission to be selected. Control unit selects DMRS transmission as the latch response transmission method when a resource in which latch preamble has been received is included in the first candidate group, but selects CRS transmission as the latch response transmission method when the resource is included in the second resource candidate group.

Sensor, information processing device, sensor control method, information processing method and non-transitory computer-readable storage medium
10880027 · 2020-12-29 · ·

The present disclosure is to enable simplification of processing for analyzing each sensor value. Provided is a sensor including a continuous excess detection part that detects a continuous excess state, which is a state where an absolute value of a sensor value exceeds a predetermined threshold value continuously for a predetermined period of time and a start specification part that specifies an operation start timing of a robot on the basis of a timing when the continuous excess state is detected.

Bridges including physical layer devices for indicating transmission times of synchronization frames by modifying previously generated corresponding follow up frames

A switching device is provided and includes a processor and a physical layer device. The processor is configured to generate a synchronization frame and a corresponding follow up frame. The follow up frame is generated while or subsequent to the generating of the synchronization frame and without waiting for an egress timestamp indicating when the synchronization frame is to be transmitted from the switching device to a network device. The physical layer device is configured to: receive the synchronization and follow up frames from the processor; prior to transmitting the follow up frame to the network device, modify the follow up frame to include the egress timestamp indicating when the synchronization frame is transmitted from the switching device via the physical layer device; and perform a precision time protocol process including transmitting the synchronization and follow up frames from the switching device to the network device for clock synchronization.

Systems and methods for reducing redundant jitter cleaners in wireless distribution systems

A digital routing unit (DRU) within a wireless distribution system (WDS) couples to multiple signal sources (e.g., base band units (BBU)) through common public radio interface (CPRI) links in such a fashion that clock reconditioning circuitry within the DRU is consolidated. That is, instead of each receiver circuit at each input at the DRU having its own clock reconditioning circuit, signals from the same network operator may be multiplexed so as to select a single signal and, from that single signal, recover a cleaned clock signal for use by all the receivers that receive signals from that network operator.