A method and apparatus for channel encoding and channel decoding in a wireless communication system are provided. The channel encoding method includes generating a first parity set and a second parity set based on information bits, determining a number of additional parity bits based on a number of the information bits and a required coding rate, generating the determined number of additional parity bits using the information bits, and generating a codeword including the information bits, the first parity set, the second parity set, and the generated additional parity bits.

Disclosed is a decoder circuit for a pulse amplitude modulation signal and a method of decoding a pulse amplitude modulation signal. The pulse amplitude modulation signal has a zeroth signal level, a first signal level, a second signal level and a third signal level. The decoder circuit comprises a first decision circuit, and a mapping circuit. The first decision circuit receives the pulse amplitude modulation signal and generates a low output signal for the first and the zeroth signal level, and generates a high output signal for the third and the second signal level. The mapping circuit receives the pulse amplitude modulation signal and generates a low output signal for the second and first signal level, and generates a high output signal for the third and zeroth signal level. Optionally, the decoder circuit comprises a logic circuit. The logic circuit receives the generated signal of the mapping circuit and the generated signal of the first decision circuit and generates a low output signal or a high output signal according to a predetermined truth table.

A method for performing, by a first device, wireless communication and an apparatus for supporting same are provided. The method includes: receiving a physical sidelink shared channel (PSSCH) from a second device; determining a physical sidelink feedback channel (PSFCH) resource associated with the PSSCH; and transmitting, to the second device, a hybrid automatic repeat request (HARQ) feedback on the PSFCH resource. Here, at least one subchannel for the PSSCH is associated with at least one first PSFCH resource including at least one second PSFCH resource, each second PSFCH resource included in the at least one first PSFCH resource is associated with each slot on the at least one subchannel, and the PSFCH resource may be determined on the basis of information related to the at least one subchannel for the PSSCH, information related to at least one slot for the PSSCH, and a source ID of the second device.

Improvements to demodulators in receivers of radios used for train communications t to receive a radio frequency (RF) signal transmitting a packet of data. A demodulator is configured to generate a soft decision for a decoder, the soft decision including reliability information determined by calculating for the bit position a logarithmic likelihood ratio (LLR). The demodulator is configured to correct a bias in the LLR calculation for any one of the bit positions resulting from a difference in the number symbols in the set of all possible symbols that could have a 0 value in the bit position and the set of all possible symbols that could have a 1 in the bit position.

The present disclosure discloses a method and a device in a User and a base station used for channel coding. A first node determines a first bit block; performs channel coding; and transmits a first radio signal. Bits in the first bit block are used to generate bits in a second bit block. The bits in the first bit block and in the second bit block are used for an input to the channel coding, an output after the channel coding is used to generate the first radio signal. Channel coding is based on a polar code. A sub-channel occupied by a target first type bit is related to the number of bits in the second bit block related to the target first type bit. The target first type bit belongs to the first bit block. The disclosure can improve decoding performance of polar codes and reduce complexity of decoding.

An uplink control information sending method, a network device, and a terminal are provided. A terminal determines physical uplink control channel PUCCH channel resource configuration information. The PUCCH channel resource configuration information is used to instruct the terminal to send uplink control information based on a configured PUCCH channel resource, and the PUCCH channel resource configuration information is preconfigured, or is sent by a network device. The terminal sends the uplink control information based on the PUCCH channel resource configuration information using the configured PUCCH channel resource. The uplink control information includes one or a combination of downlink data acknowledgement information, a downlink channel state information, a scheduling request, and buffer state information. According to the method, a speed of feeding back uplink control information corresponding to downlink data and a speed of performing feedback using an uplink request resource can be increased.

Embodiments of this application provide a data transmission method and device, so as to increase an uplink/downlink data transmission throughput. The method includes: splitting a to-be-transmitted transport block into N code blocks with incompletely equal sizes, where N is an integer greater than or equal to 2; performing error correction coding on the N code blocks to obtain N encoded bit blocks; and non-orthogonally transmitting the N encoded bit blocks by using resources that are the same in at least one dimension of a time domain, a frequency domain, a space domain, and a code domain.

A circuit performs a turbo detection process recovering data symbols from a received signal effected, during transmission, by a Markov process with effect that the data symbols are dependent on preceding data symbols represented as a trellis having a plurality of trellis stages. The circuit comprises processing elements, associated with trellis stages representing these dependencies and each configured to receive soft decision values corresponding to associated data symbols Each processing element configured, in one clock cycle to receive data representing a priori forward and backward state metrics, and a priori soft decision values for data symbols detected for the trellis stage. For each clock cycle of the turbo detection process, the circuit processes, for processing elements representing the trellis stages, the a priori information for associated data symbols detected for the trellis stage, and to provide extrinsic soft decision values corresponding to data symbols for a next clock cycle.

Apparatus and methods for finding a vector solution to a tree search problem are disclosed. In some embodiments, the apparatus and methods can be used for sphere decoding. The tree search is performed by: obtaining a tree graph; identifying a plurality of nodes in the tree graph that are likely to be part of the solution to the tree graph; partitioning the tree graph into a plurality of sub-trees, each sub-tree including one or more of the identified nodes; processing the plurality of sub-trees in parallel by allocating one or more of the processing elements to each of the sub-trees; and determining the solution based on results of the sub-tree processing.

Disclosed is a decoder circuit for a pulse amplitude modulation signal and a method of decoding a pulse amplitude modulation signal. The pulse amplitude modulation signal has a zeroth signal level, a first signal level, a second signal level and a third signal level. The decoder circuit comprises a first decision circuit, and a mapping circuit. The first decision circuit receives the pulse amplitude modulation signal and generates a low output signal for the first and the zeroth signal level, and generates a high output signal for the third and the second signal level. The mapping circuit receives the pulse amplitude modulation signal and generates a low output signal for the second and first signal level, and generates a high output signal for the third and zeroth signal level. Optionally, the decoder circuit comprises a logic circuit. The logic circuit receives the generated signal of the mapping circuit and the generated signal of the first decision circuit and generates a low output signal or a high output signal according to a predetermined truth table.