A variable ISI transmission channel apparatus inserted in a high-speed transmission channel for the high-speed serial data communication simulates a live ISI environment to which the high-speed transmission channel in operation is exposed, in a situation such as a bit error test by means of continuously adjusting an amount of inter-symbol interference (ISI) in the high-speed transmission channel. By allowing an undersurface of a transmission loss generating member (6) (16) (26) such as a dielectric, a magnetic body, and an electric conductor to face, and slide on, a top surface of a conductor strip (2) exposed on a top surface of a plate-shaped dielectric substrate (1), a facing area is continuously increased/decreased. A dielectric loss, a magnetic loss, or a resistance loss increased/decreased in the transmission loss generating member is reflected on a high-frequency signal on the conductor strip (2).

A method for testing a vehicle-to-X communication module by means of a diagnostic device as well as an associated vehicle-to-X communication module and an associated diagnostic device. During a test mode messages are exchanged between the vehicle-to-X communication module and the diagnostic device, and evaluated in order to detect errors.

A signal generator includes inverse characteristic calculation means for calculating an inverse characteristic of a transfer function from an inverse characteristic of a frequency characteristic of a signal based on the transmission standard, inverse Fourier transform means for calculating impulse responses of a plurality of points by performing inverse Fourier transform on the inverse characteristic of the transfer function, impulse response cutout means for cutting out the points for a predetermined number of taps from the impulse response, frequency characteristic calculation means for calculating a frequency characteristic based on values of the points for the number of taps cut out from the impulse response, and display control means for displaying on a display screen, the frequency characteristic calculated by the frequency characteristic calculation means and an ideal frequency characteristic read from an S parameter file of a device under test.

A serial communication interface circuit includes a transmitter configured to convert first parallel data into first serial data and transmit the first serial data through an output port; a receiver configured to receive second serial data through an input port and convert the second serial data into second parallel data; a test controller configured to generate at least one test control signal; and an embedded external loopback circuit configured to form an external loopback path between the output port and the input port to receive the first serial data and output the second serial data according to at least one channel model in response to the at least one test control signal in a test mode.

A test instrument or host device can apply inverse transmitter and receiver functions to data transmitted or received by an electrical and optical transponder. The inverse transmitter and receiver functions are applied to counteract internal signal conversion processes of the transponder. Forward error correction and test pattern analysis may be performed on signals received from the transponder after the inverse receiver function is applied to the received signals.

A system includes the transmitter that transmits a first adjustment signal obtained based on a first parameter, detects, based on an output potential of the transmitter, a second parameter that is among values settable to the first parameter and sets the second parameter and the receiver that receives the first adjustment signal from the transmitter and acquire a second adjustment signal by adjusting the first adjustment signal based on a third parameter, sets the third parameter, counts the number of errors of the second adjustment signal based on a difference between the second adjustment signal and the test pattern, determines, based on the number of errors of the second adjustment signal, the second parameter to be set in the transmitter and controls the connection of the terminal resistor to the input terminal based on the second parameter.

A test instrument measures performance of a transponder without direct access to a line interface of the transponder. The test instrument learns parameters of internal signal conversion processes of the transponder and measures performance of the transponder based on the learned parameters.

A signal generator includes inverse characteristic calculation means for calculating an inverse characteristic of a transfer function from an inverse characteristic of a frequency characteristic of a signal based on the transmission standard, inverse Fourier transform means for calculating impulse responses of a plurality of points by performing inverse Fourier transform on the inverse characteristic of the transfer function, impulse response cutout means for cutting out the points for a predetermined number of taps from the impulse response, frequency characteristic calculation means for calculating a frequency characteristic based on values of the points for the number of taps cut out from the impulse response, and display control means for displaying on a display screen, the frequency characteristic calculated by the frequency characteristic calculation means and an ideal frequency characteristic read from an S parameter file of a device under test.

Provided test method and apparatus of communication chip, device and medium. The test method of communication chip includes receiving end test method and transmitting end test method. The receiving end test method of the communication chip includes: an idle time slot of the receiving end of the communication chip is detected in a running process of the communication chip; a test vector is generated, and a standard result corresponding to the test vector is generated; a data frame containing the test vector is constructed, and the data frame is sent to the receiving end of the communication chip in the idle time slot to enable the receiving end of the communication chip to process the data frame; and a chip processing result uploaded by the receiving end of the communication chip is received, and the standard result is compared with the chip processing result.

A method for generating M parallel pseudorandom binary sequences (PRBSs), each comprising a 2.sup.n1 sequence of pseudorandom bits, includes loading into the circuit an initial M-bit word, the initial M-bit word comprising M sequential bits selected from a pre-determined PRBS-n sequence, wherein n>1 and M>n. The method includes generating, using a plurality of logic gates of the circuit, a next M-bit word using at least n+1 of the M sequential bits of the initial M-bit word. The method includes repeatedly generating, using the logic gates of the circuit, the next M-bit word from a previous M-bit word using the at least n+1 of M sequential bits of the previous M-bit word, resulting in M parallel sequences of the PRBS-n sequence. The method includes transmitting the generated next M-bit words on an M-bit wide parallel bus.