A method and system that provides for execution of a first calibration sequence, such as upon initialization of a system, to establish an operation value, which utilizes an algorithm intended to be exhaustive, and executing a second calibration sequence from time to time, to measure drift in the parameter, and to update the operation value in response to the measured drift. The second calibration sequence utilizes less resources of the communication channel than does the first calibration sequence. In one embodiment, the first calibration sequence for measurement and convergence on the operation value utilizes long calibration patterns, such as codes that are greater than 30 bytes, or pseudorandom bit sequences having lengths of 2.sup.N1 bits, where N is equal to or greater than 7, while the second calibration sequence utilizes short calibration patterns, such as fixed codes less than 16 bytes, and for example as short as 2 bytes long.

A detector circuit includes a calculator circuit and a comparator circuit. The calculator circuit is configured to generate a plurality of first calculation values according to a plurality of first calculation symbols of a Pseudo-Noise Sequence and a plurality of second calculation symbols of a received signal, and generate a second calculation value according to the first calculation values. If a sign of a symbol of the Pseudo-Noise Sequence is the same to a sign of an adjacent symbol, the symbol is one of the first calculation symbols, and the second calculation symbols are corresponding to the first calculation symbols respectively. The comparator circuit is configured to generate a comparison result according to the second calculation value and a threshold value. The comparison result is configured for determining whether the detector circuit correctly receives the Pseudo-Noise Sequence.

A detector circuit incudes a calculator circuit and a comparator circuit. The calculator circuit is configured to generate a plurality of first calculation values according to a plurality of first calculation symbols of a Pseudo-Noise Sequence and a plurality of second calculation symbols of a received signal, and generate a second calculation value according to the first calculation values. If a sign of a symbol of the Pseudo-Noise Sequence is the same to a sign of an adjacent symbol, the symbol is one of the first calculation symbols, and the second calculation symbols are corresponding to the first calculation symbols respectively. The comparator circuit is configured to generate a comparison result according to the second calculation value and a threshold value. The comparison result is configured for determining whether the detector circuit correctly receives the Pseudo-Noise Sequence.

Systems, apparatuses, and methods for utilizing training sequences on a replica lane are described. A transmitter is coupled to a receiver via a communication channel with a plurality of lanes. One of the lanes is a replica lane used for tracking the drift in the optimal sampling point due to temperature variations, power supply variations, or other factors. While data is sent on the data lanes, test patterns are sent on the replica lane to determine if the optimal sampling point for the replica lane has drifted since a previous test. If the optimal sampling point has drifted for the replica lane, adjustments are made to the sampling point of the replica lane and to the sampling points of the data lanes.

Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

The present application relates to a method of generating a downlink frame. The method of generating the downlink frame includes: generating a first short sequence and a second short sequence indicating cell group information; generating a first scrambling sequence and a second scrambling sequence determined by the primary synchronization signal; generating a third scrambling sequence determined by the first short sequence and a fourth scrambling sequence determined by the second short sequence; scrambling the short sequences with the respective scrambling sequences; and mapping the secondary synchronization signal that includes the first short sequence scrambled with the first scrambling sequence, the second short sequence scrambled with the second scrambling sequence and the third scrambling sequence, the second short sequence scrambled with the first scrambling sequence and the first short sequence scrambled by the second scrambling sequence and the fourth scrambling sequence to a frequency domain.

The present invention provides a preamble that is inserted into an OFDMA frame and has a common sequence for all the base stations participating in a transmission. The subscriber station performs fine synchronization using the common sequence on the common preamble, and the resulting peaks will provide the locations of candidate base stations. The base station specific search is then performed in the vicinities of those peaks by using base station specific pseudo-noise sequences. With this two stage cell search, the searching window is drastically reduced. The preamble is matched to known values by a respective receiver to decode the signals and permit multiple signals to be transferred from the transmitter to the receiver. The preamble may comprise two parts, Preamble-1 and Preamble-2, which may be used in different systems, including multioutput, multi-input (MIMO) systems.

A method and system that provides for execution of a first calibration sequence, such as upon initialization of a system, to establish an operation value, which utilizes an algorithm intended to be exhaustive, and executing a second calibration sequence from time to time, to measure drift in the parameter, and to update the operation value in response to the measured drift. The second calibration sequence utilizes less resources of the communication channel than does the first calibration sequence. In one embodiment, the first calibration sequence for measurement and convergence on the operation value utilizes long calibration patterns, such as codes that are greater than 30 bytes, or pseudorandom bit sequences having lengths of 2.sup.N1 bits, where N is equal to or greater than 7, while the second calibration sequence utilizes short calibration patterns, such as fixed codes less than 16 bytes, and for example as short as 2 bytes long.

A processing module for a receiver device. The processor module comprises a channel estimate generation component arranged to output channel estimate information for a received signal, and a timestamping module arranged to determine a ToA measurement for a marker within a packet of the received signal based at least partly on the channel estimate information for the received signal generated by the channel estimate generation component. The channel estimate generation component comprises a validation component arranged to derive a validation pattern for the packet within the received signal for which a ToA measurement is to be determined, identify a section of the packet containing a validation sequence, and perform cross-correlation between at least a part of the validation sequence within the packet and at least a part of the generated validation pattern to generate channel estimate validation information.